MC908MR32CFUE Freescale Semiconductor, MC908MR32CFUE Datasheet - Page 214

• Manufacturer Part Number: MC908MR32CFUE
• Description: IC MCU 8MHZ 32K FLASH 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908MR32CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 44
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08MR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8.2 MHz
• Number Of Programmable I/os: 44
• Number Of Timers: 6
• Operating Supply Voltage: 0 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Serial Peripheral Interface Module (SPI)
Use this formula to calculate the SPI baud rate:
where:
15.12.3 SPI Data Register
The SPI data register consists of the read-only receive data register and the write-only transmit data
register. Writing to the SPI data register writes data into the transmit data register. Reading the SPI data
register reads data from the receive data register. The transmit data and receive data registers are
separate registers that can contain different values. See
R7:R0/T7:T0 — Receive/Transmit Data Bits
214
CGMOUT = base clock output of the clock generator module (CGM)
BD = baud rate divisor
Address: $0046
Do not use read-modify-write instructions on the SPI data register since the
register read is not the same as the register written.
Reset:
Read:
Write:
Bit 7
R7
T7
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
SPR1:SPR0
Table 15-4. SPI Master Baud Rate Selection
Figure 15-16. SPI Data Register (SPDR)
00
01
10
11
R6
T6
6
Baud rate
R5
T5
5
Indeterminate after reset
NOTE
=
R4
T4
4
Baud Rate Divisor (BD)
CGMOUT
------------------------- -
2
Figure
×
BD
R3
T3
3
128
32
2
8
15-2.
R2
T2
2
R1
T1
1
Freescale Semiconductor
Bit 0
R0
T0