MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1359

IC MPU 32BIT 56MHZ PPC 388-PBGA

MPC561MZP56

Manufacturer Part Number
MPC561MZP56
Description
IC MPU 32BIT 56MHZ PPC 388-PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheet

Specifications of MPC561MZP56

Core Processor
PowerPC
Core Size
32-Bit
Speed
56MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
64
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
388-BGA
Controller Family/series
POWER 5xx
No. Of I/o's
56
Ram Memory Size
31KB
Cpu Speed
56MHz
No. Of Timers
32
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
12
Rohs Compliant
No
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
22
Operating Supply Voltage
2.6 V to 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
No

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Note: (T
Note: (T
Note: All AC timing is tested to the 5-V levels outlined in
Freescale Semiconductor
1
2
3
A
Num
120a
121a
A
Num
120b
121b
All AC timing is tested to the 5-V levels outlined in <XrefBlue>Table G.6 on page G-7
TC is defined to be the clock period.
121
For high time, n = External SCK rise time; for low time, n = External SCK fall time.
= T
= T
L
L
to T
to T
PCS[0:1] Rise Time
Input –
Output –
up to 50 pF, SLRC1 bit of PDMCR = “0” (slow)
up to 50 pF, SLRC1 bit of PDMCR = “1” (fast)
SCK, MOSI, MISO Fall Time
Input –
Output –
up to 50 pF, SLRC1 bit of PDMCR = “0” (slow)
up to 200 pF, SLRC1 bit of PDMCR = “1” (fast)
up to 200 pF, SLRC1 bit of PDMCR = “0” (slow)
PCS[0:1] Fall Time
Input –
Output –
up to 50 pF, SLRC1 bit of PDMCR = “0” (slow)
up to 50 pF, SLRC1 bit of PDMCR = “1” (fast)
TXD Rise Time
Input –
Output –
up to 50 pF, SLRC2 bit of PDMCR = “0” (slow)
up to 50 pF, SLRC2 bit of PDMCR = “1” (fast)
TXD Fall Time
Input –
Output –
up to 50 pF, SLRC2 bit of PDMCR = “0” (slow)
up to 50 pF, SLRC2 bit of PDMCR = “1” (fast)
H ,
H ,
50 pF load on all QSPI pins unless otherwise noted)
50 pF load on all SCI pins unless otherwise noted)
Function
Function
MPC561/MPC563 Reference Manual, Rev. 1.2
Table G-17. QSPI Timing (continued)
Table G-18. QSCI Timing
Table G.6
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
RO
RO
FO
FO
FO
FO
FO
RO
RO
FO
FO
t
t
t
t
t
rI
rI
rI
rI
rI
Min
Min
66-MHz Electrical Characteristics
Max
Max
200
300
50
25
21
50
25
50
25
50
25
1
1
1
1
1
Unit
Unit
µs
ns
ns
µs
ns
ns
ns
µs
ns
ns
µs
ns
ns
µs
ns
ns
G-53

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