MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1027

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

24.10 Read/Write Access
The read/write access feature allows access to internal memory-mapped space via the auxiliary port.
Read/write mechanism supports single and block, reads and writes.
24.10.1 Functional Description
The READI module is capable of bus mastership on the L-bus and for setting up and reading data and
status.
All accesses are setup and initiated to the read/write access register (RWA) and upload/download
information register (UDI) via the four auxiliary access public messages: device ready for
upload/download, upload request (tool requests information), download request (tool provides
information), upload/download information (device/tool provides information).
Read/write access features are enabled by setting the appropriate fields in the RWA register. For details on
field configuration, refer to
The functional flow for read/write access to memory-mapped locations and MPC500 registers is depicted
in
Freescale Semiconductor
Figure
TCODE = 8
Error Code = 0b00111 (Program/Data/Ownership trace overrun)
MCKO
MSEO
MDO[7:0]
24-59.
Figure 24-54. Error Message (Program/Data/Ownership Trace Overrun)
TCODE (17)
[6 bits]
Section 24.6.1.7, “Read/Write Access Register
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 24-56. Read Register Message
Figure 24-55. Target Ready Message
Max Length = 14 bits
Min Length = 14 bits
Max Length = 6 bits
Min Length = 6 bits
TCODE (16)
11001000
[6 bits]
Opcode
[8 bits]
00000001
Don’t care data
(idle clock)
(RWA).”
00000000
READI Module
24-59