Z16F2811AL20SG Zilog, Z16F2811AL20SG Datasheet - Page 92

IC ZNEO MCU FLASH 128K 100LQFP

Z16F2811AL20SG

Manufacturer Part Number
Z16F2811AL20SG
Description
IC ZNEO MCU FLASH 128K 100LQFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheets

Specifications of Z16F2811AL20SG

Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
76
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Processor Series
Z16F2x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
76
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4533

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Table 33. Port A-K Pull-Up Enable Registers (PxPUE)
Table 34. Port A-K Stop Mode Recovery Source Enable Registers (PxSMRE)
PS022008-0810
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
Port A-K Pull-Up Enable Registers
Port A-K Stop Mode Recovery Source Enable Registers
PSMRE7
PUE7
R/W
R/W
7
0
7
0
0 = The drains are enabled for any output mode.
1 = The drain of the associated pin is disabled (open-drain mode).
Setting the bits in the Port A-K pull-up enable registers (see
internal resistive pull-up on the specified port pins. These registers affect the pins directly
and as a result, alternate functions are also affected.
PUE[7:0]—Port Pull-Up Enable
These bits function independently of the alternate function bit and enable the weak pull-up if
set to 1.
0 = The weak pull-up on the port pin is disabled.
1 = The weak pull-up on the port pin is enabled.
Setting the bits in the Port A-K Stop Mode Recovery source enable registers (see
to 1 configures the specified port pins as a Stop Mode Recovery source. During STOP
mode, any logic transition on a port pin enabled as a Stop Mode Recovery source initiates
Stop Mode Recovery.
PSMRE6
PUE6
R/W
R/W
FF_E107, FF_E117, FF_E127, FF_E137, FF_E147, FF_E157,
6
0
6
0
FF_E108, FF_E118, FF_E128, FF_E138, FF_E148,
FF_E158, FF_E168, FF_E178, FF_E188, FF_E198
PSMRE5
PUE5
FF_E167, FF_E177, FF_E187, FF_E197
R/W
R/W
5
5
0
0
P R E L I M I N A R Y
PSMRE4
PUE4
R/W
R/W
4
0
4
0
PSMRE3
PUE3
R/W
R/W
3
3
0
0
PSMRE2
PUE2
R/W
R/W
Table
2
0
2
0
General-Purpose Input/Output
Product Specification
33) to 1, enables a weak
ZNEO
PSMRE1
PUE1
R/W
R/W
1
1
0
0
Z16F Series
PSMRE0
Table
PUE0
R/W
R/W
0
0
0
0
34)
77

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