PIC18F96J65-I/PT Microchip Technology, PIC18F96J65-I/PT Datasheet - Page 447

• Manufacturer Part Number: PIC18F96J65-I/PT
• Description: IC PIC MCU FLASH 48KX16 100TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F96J65-I/PT

• Core Size: 8-Bit
• Program Memory Size: 96KB (48K x 16)
• Core Processor: PIC
• Speed: 41.667MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 70
• Program Memory Type: FLASH
• Ram Size: 3808 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TFQFP
• Controller Family/series: PIC18
• No. Of I/o's: 70
• Ram Memory Size: 3.71875KB
• Cpu Speed: 41.667MHz
• No. Of Timers: 5
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3808 B
• Interface Type: Display Driver, Ethernet, EUSART, I2C, MSSP, SPI
• Maximum Clock Frequency: 41.667 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 5
• Operating Supply Voltage: 2.35 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM183033, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162064 - HEADER INTFC MPLABICD2 64/80/100AC164323 - MODULE SKT FOR 100TQFP
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 27-17:
TABLE 27-22: MASTER SSP I
FIGURE 27-18:
© 2009 Microchip Technology Inc.
Param.
90
91
92
93
Note 1:
No.
Note:
SCLx
SDAx
T
T
T
T
Symbol
Refer to Figure 27-3 for load conditions.
SU
SU
HD
HD
Maximum pin capacitance = 10 pF for all I
Note:
SDAx
Out
SDAx
In
SCLx
:
:
:
:
STA
STO
STA
STO
Refer to Figure 27-3 for load conditions.
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
90
MASTER SSP I
MASTER SSP I
Condition
Start
90
103
Characteristic
91
91
2
109
C™ BUS START/STOP BITS REQUIREMENTS
2
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
2
1 MHz mode
C™ BUS START/STOP BITS TIMING WAVEFORMS
C™ BUS DATA TIMING
100
106
(1)
(1)
(1)
2
(1)
C™ pins.
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
101
109
PIC18F97J60 FAMILY
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
Min
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
)(BRG + 1)
107
Max
—
—
—
—
—
—
—
—
—
—
—
—
92
92
Units
Condition
ns
ns
ns
ns
102
Stop
110
Only relevant for
Repeated Start
condition
After this period, the
first clock pulse is
generated
93
DS39762E-page 447
Conditions