DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 8

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F803 are organized into functional groups, as shown in
and as illustrated in
signals present on a pin.
8
Power (V
Ground (V
Supply Capacitors
PLL and Clock
Address Bus
Data Bus
Bus Control
Interrupt and Program Control
Pulse Width Modulator (PWM) Port
Serial Peripheral Interface (SPI) Port
Quadrature Decoder Port
Serial Communications Interface (SCI) Port
CAN Port
Analog to Digital Converter (ADC) Port
Quad Timer Module Port
JTAG/On-Chip Emulation (OnCE)
1. Alternately, GPIO pins
2. Alternately, Quad Timer pins
Figure
DD
SS
or V
1
or V
Table 2-1 Functional Group Pin Allocations
DDA
Functional Group
SSA
2-1. In
)
)
2
Table 2-2
56F803 Technical Data, Rev. 16
1
through
1
Table
2-17, each table row describes the signal or
Number of
Pins
16
16
12
7
7
2
3
4
4
4
4
2
2
9
2
6
Description
Table 2-10
Table 2-11
Table 2-12
Table 2-13
Table 2-14
Table 2-15
Table 2-16
Table 2-17
Table 2-2
Table 2-3
Table 2-5
Table 2-6
Table 2-7
Table 2-8
Table 2-9
Table 2-4
Detailed
Freescale Semiconductor
Table 2-1

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