DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 15

KIT EVALUATION FOR DSP56F803

DSP56F803EVM

Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor

Specifications of DSP56F803EVM

Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
2.8 Quadrature Decoder Signals
2.9 Serial Communications Interface (SCI) Signals
Freescale Semiconductor
No. of
No. of
Pins
Pins
1
1
1
1
1
1
GPIOE0
GPIOE1
PHASEA0
PHASEB0
Signal
Name
RXD0
TXD0
INDEX0
HOME0
Signal
Name
TA0
TA1
TA2
TA3
Table 2-13 Serial Communications Interface (SCI0) Signals
Signal Type
Input/Output
Input/Output
Table 2-12 Quadrature Decoder (Quad Dec0) Signals
Input/Output
Input/Output
Input/Output
Input/Output
Output
Input
Signal
Type
Input
Input
Input
Input
State During
State During
Reset
Input
Input
Input
Input
Reset
Input
Input
Input
Input
Input
Input
Input
Input
56F803 Technical Data, Rev. 16
Transmit Data (TXD0)—SCI0 transmit data output
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SCI output.
Receive Data (RXD0)— SCI0 receive data input
Port E GPIO—This General Purpose I/O (GPIO) pin can be
individually programmed as an input or output pin.
After reset, the default state is SCI input.
Phase A—Quadrature Decoder #0 PHASEA input
TA0—Timer A Channel 0
Phase B—Quadrature Decoder #0 PHASEB input
TA1—Timer A Channel 1
Index—Quadrature Decoder #0 INDEX input
TA2—Timer A Channel 2
Home—Quadrature Decoder #0 HOME input
TA3—Timer A Channel 3
Signal Description
Signal Description
Quadrature Decoder Signals
15

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