DSP56F803EVM Freescale Semiconductor, DSP56F803EVM Datasheet - Page 23
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DSP56F803EVM
Manufacturer Part Number
DSP56F803EVM
Description
KIT EVALUATION FOR DSP56F803
Manufacturer
Freescale Semiconductor
Datasheets
1.CWH-UTP-ONCE-HE.pdf
(2 pages)
2.DSP56F803EVM.pdf
(68 pages)
3.DSP56F803BU80E.pdf
(52 pages)
Specifications of DSP56F803EVM
Processor To Be Evaluated
56F803
Data Bus Width
16 bit
Interface Type
RS-232, JTAG
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Figure 3-3
3.4 Flash Memory Characteristics
Freescale Semiconductor
•
•
•
•
Standby
Read
Word Program
Page Erase
Mass Erase
Input Signal
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached V
Data Invalid state, when a signal level is in transition between V
1. X address enable, all rows are disabled when XE = 0
2. Y address enable, YMUX is disabled when YE = 0
3. Sense amplifier enable
4. Output enable, tri-state Flash data out bus when OE = 0
Note: The midpoint is V
shows the definitions of the following signal states:
Data Invalid State
Mode
Data1 Valid
Data1
Figure 3-2 Input Signal Measurement References
Fall Time
IL
XE
H
H
H
H
L
Data Active
+ (V
Midpoint1
1
Table 3-5 Flash Memory Truth Table
IH
V
YE
– V
IH
H
H
L
L
L
2
IL
Figure 3-3 Signal States
)/2.
56F803 Technical Data, Rev. 16
Data2 Valid
SE
Data2
H
L
L
L
L
3
OE
Low
V
H
L
L
L
L
IL
4
OL
or V
PROG
Tri-stated
H
L
L
L
L
OH
Data
5
OL
ERASE
Rise Time
and V
H
H
L
L
L
High
OH
6
Data3 Valid
Data3
Data Active
MAS1
H
L
L
L
L
Flash Memory Characteristics
7
90%
50%
10%
NVSTR
H
H
H
L
L
8
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