C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 162

• Manufacturer Part Number: C8051F530-TB
• Description: BOARD PROTOTYPE W/C8051F530
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F530-TB

• Contents: Board
• Processor To Be Evaluated: C8051F52xA and C8051F53xA
• Interface Type: USB
• Lead Free Status / RoHS Status: Vendor undefined / Vendor undefined
• For Use With/related Products: C8051F530
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F52x/F52xA/F53x/F53xA
Table 16.1. SPI Slave Timing Parameters
162
Master Mode Timing* (See Figure 16.6 and Figure 16.7)
Slave Mode Timing* (See Figure 16.8 and Figure 16.9)
Note: T
Parameter
T
T
T
T
T
T
T
T
T
T
MCKH
T
MCKL
T
T
CKH
CKL
SOH
SEZ
SDZ
MIS
MIH
SIS
SIH
The maximum possible frequency of the SPI can be calculated as: 
Transmission: SYSCLK/2 
Reception: SYSCLK/10
SE
SD
SYSCLK
is equal to one period of the device system clock (SYSCLK) in ns. 
SCK High Time
SCK Low Time
MISO Valid to SCK Sample Edge
SCK Sample Edge to MISO Change
NSS Falling to First SCK Edge
Last SCK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High-Z
SCK High Time
SCK Low Time
MOSI Valid to SCK Sample Edge
SCK Sample Edge to MOSI Change
SCK Shift Edge to MISO Change
Description
Rev. 1.3
1 x T
1 x T
2 x T
2 x T
5 x T
5 x T
2 x T
2 x T
Min
20
SYSCLK
SYSCLK
SYSCLK
SYSCLK
—
—
SYSCLK
SYSCLK
SYSCLK
SYSCLK
—
0
4 x T
4 x T
4 x T
Max
—
—
—
—
—
—
SYSCLK
SYSCLK
—
—
—
—
SYSCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns