C8051F530-TB Silicon Laboratories Inc, C8051F530-TB Datasheet - Page 136
C8051F530-TB
Manufacturer Part Number
C8051F530-TB
Description
BOARD PROTOTYPE W/C8051F530
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F530-TB.pdf
(218 pages)
Specifications of C8051F530-TB
Contents
Board
Processor To Be Evaluated
C8051F52xA and C8051F53xA
Interface Type
USB
Lead Free Status / RoHS Status
Vendor undefined / Vendor undefined
For Use With/related Products
C8051F530
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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C8051F52x/F52xA/F53x/F53xA
SFR Definition 14.1. OSCICN: Internal Oscillator Control
136
Bits7–6: IOSCEN[1:0]: Internal Oscillator Enable Bits.
Bit5:
Bit4:
Bit3:
Bits2–0: IFCN2–0: Internal Oscillator Frequency Control Bits.
IOSCEN1 IOSCEN0 SUSPEND
R/W
Bit7
00: Oscillator Disabled.
01: Reserved.
10: Reserved.
11: Oscillator Enabled in Normal Mode and Disabled in Suspend Mode.
SUSPEND: Internal Oscillator Suspend Enable Bit.
Setting this bit to logic 1 places the internal oscillator in SUSPEND mode. The internal oscil-
lator resumes operation when one of the SUSPEND mode awakening events occur.
IFRDY: Internal Oscillator Frequency Ready Flag.
0: Internal Oscillator is not running at programmed frequency.
1: Internal Oscillator is running at programmed frequency.
UNUSED. Read = 0b, Write = don't care.
000: SYSCLK derived from Internal Oscillator divided by 128 (default).
001: SYSCLK derived from Internal Oscillator divided by 64.
010: SYSCLK derived from Internal Oscillator divided by 32.
011: SYSCLK derived from Internal Oscillator divided by 16.
100: SYSCLK derived from Internal Oscillator divided by 8.
101: SYSCLK derived from Internal Oscillator divided by 4.
110: SYSCLK derived from Internal Oscillator divided by 2.
111: SYSCLK derived from Internal Oscillator divided by 1.
R/W
Bit6
R/W
Bit5
IFRDY
Bit4
R
Rev. 1.3
Bit3
—
R
IFCN2
R/W
Bit2
IFCN1
R/W
Bit1
SFR Address:
IFCN0
R/W
Bit0
11000000
Reset Value
0xB2
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