C8051F411EK Silicon Laboratories Inc, C8051F411EK Datasheet - Page 185
![KIT EVAL FOR C8051F411](/photos/9/25/92547/c8051f411ek_sml.jpg)
C8051F411EK
Manufacturer Part Number
C8051F411EK
Description
KIT EVAL FOR C8051F411
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F411EK
Contents
Evaluation Board, CD-ROM, USB Cable, Batteries and User Guide
Processor To Be Evaluated
C8051F41x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F411
Silicon Family Name
C8051F41x
Kit Contents
LCD Based Evaluation Board, USB Cable, Software CD And Quick-Start Guide
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051F41x
For Use With
336-1315 - KIT REF DESIGN VOICE RECORD F41X
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1317
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20.3. smaRTClock Timer and Alarm Function
The smaRTClock timer is a 47-bit counter that, when running (RTC0TR = 1), is incremented every RTC-
CLK cycle. The timer has an alarm function that can be set to generate an interrupt, reset the MCU, or
release the internal oscillator from Suspend Mode at a specific time.
20.3.1. Setting and Reading the smaRTClock Timer Value
The 47-bit smaRTClock timer can be set or read using the six CAPTUREn internal registers. Note that the
timer does not need to be stopped before reading or setting its value. The following steps can be used to
set the timer value:
Bit 7:
Bit 6:
Bit 5:
Bit 4:
Bits 3–1: UNUSED. Read = 000b. Write = don’t care.
Bit 0:
AGCEN
Internal Register Definition 20.5. RTC0XCN: smaRTClock Oscillator Control
R/W
Bit7
Note: This register is not an SFR. It can only be accessed indirectly through RTC0ADR and RTC0DAT.
Step 1. Write the desired 47-bit set value to the CAPTUREn registers (the LSB of CAPTURE0 is
Step 2. Write ‘1’ to RTC0SET. This will transfer the contents of the CAPTUREn registers to the
Step 3. Operation is complete when RTC0SET is cleared to ‘0’ by hardware.
AGCEN: Crystal Oscillator Automatic Gain Control Enable Bit (Crystal Mode only).
0: Automatic Gain Control disabled.
1: Automatic Gain Control enabled.
XMODE: smaRTClock Mode Select Bit.
This bit selects whether smaRTClock will be used with or without a crystal.
0: smaRTClock is configured to Self-Oscillate Mode.
1: smaRTClock is configured to Crystal Mode.
BIASX2: smaRTClock Bias Double Enable Bit.
0: smaRTClock Bias Current Doubling is disabled.
1: smaRTClock Bias Current Doubling is enabled.
CLKVLD: smaRTClock Clock Valid Bit.
Set by hardware when the smaRTClock crystal oscillator is nearly stable. This bit always
reads 1b when smaRTClock is used in Self-Oscillate Mode (XMODE = 0). This bit should be
checked at least 1 ms after enabling the smaRTClock oscillator circuit and should not be
used for an oscillator fail detect (use OSCFAIL in RTC0CN instead).
VBATEN: smaRTClock V
Note: This bit always reads 1b when smaRTClock is disabled (RTC0EN = 0).
For smaRTClock enabled (RTC0EN = 1):
0: smaRTClock is powered from V
1: smaRTClock is powered from the V
XMODE
not used).
timer.
R/W
Bit6
BIASX2
R/W
Bit5
CLKVLD
BAT
Bit4
R
Indicator.
DD
.
Rev. 1.1
RTC-BACKUP
Bit3
R
-
supply.
Bit2
R
-
C8051F410/1/2/3
Bit1
R
-
VBATEN
Bit0
R
smaRTClock
Reset Value
Variable
Address:
0x07
185
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