Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 67

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

Table 31. Trap and Interrupt Vectors in Order of Priority (Continued)
Architecture
Operation
PS026308-1207
Priority
Lowest
Master Interrupt Enable
Program
Memory
Vector Address Interrupt or Trap Source
0036H
0038H
Figure 9
The master interrupt enable bit (IRQE) in the interrupt control register globally enables
and disables the interrupts.
Interrupts are globally enabled by any of the following actions:
•
Internal Interrupts
Port Interrupts
Execution of an EI (enable interrupt) instruction
displays the interrupt controller block diagram.
Figure 9. Interrupt Controller Block Diagram
Port C0, both input edges
Reserved
Medium
Priority
Priority
Priority
High
Low
Priority
Mux
Z8 Encore!
Product Specification
Vector
IRQ Request
®
Interrupt Controller
F083A Series
55