Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 101
Z8F083A0128ZCOG
Manufacturer Part Number
Z8F083A0128ZCOG
Description
KIT DEVELOPMENT F083A
Manufacturer
Zilog
Series
Z8 Encore! XP®r
Type
MCUr
Specifications of Z8F083A0128ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F083A
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4672
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PS026308-1207
Watchdog Timer Reload Unlock Sequence
WDT Interrupt in STOP Mode
If configured to generate an interrupt when a time-out occurs and the Z8 Encore! F083A
Series devices are in STOP mode, the Watchdog Timer automatically initiates a Stop
Mode Recovery and generates an interrupt request. Both the WDT status bit and the STOP
bit in the Watchdog Timer control register are set to 1 following a WDT time-out in STOP
mode. For more details on Stop Mode Recovery, see
page 23.
If interrupts are enabled, following completion of the Stop Mode Recovery, the eZ8 CPU
responds to the interrupt request by fetching the Watchdog Timer interrupt vector and
executes the code from the vector address.
WDT Reset in Normal Operation
If configured to generate a reset when a time-out occurs, the Watchdog Timer forces the
device into the system Reset state. The WDT status bit in the Watchdog Timer control
register is set to 1. For more details on system reset, see
on page 23.
WDT Reset in STOP Mode
If configured to generate a reset when a time-out occurs and the device is in STOP mode,
the Watchdog Timer initiates a Stop Mode Recovery. Both the WDT status bit and the
STOP bit in the Watchdog Timer control register are set to 1 following WDT time-out in
STOP mode. For more details, see
Writing the unlock sequence to the Watchdog Timer (WDTCTL) control register address,
unlocks the three Watchdog Timer reload byte registers (WDTU, WDTH, and WDTL) to
allow changes to the time-out period. These Write operations to the WDTCTL register
address produce no effect on the bits in the WDTCTL register. The locking mechanism
prevents spurious writes to the reload registers. The following sequence is required to
unlock the Watchdog Timer reload byte registers (WDTU, WDTH, and WDTL) for write
access.
1. Write
2. Write
3. Write the Watchdog Timer reload upper byte register (WDTU).
4. Write the Watchdog Timer reload high byte register (WDTH).
5. Write the Watchdog Timer reload low byte register (WDTL).
All three Watchdog Timer reload registers must be written in the order listed above. There
must be no other register writes between each of these operations. If a register write
55H
AAH
to the Watchdog Timer control register (WDTCTL).
to the Watchdog Timer control register (WDTCTL).
Reset and Stop Mode Recovery
Reset and Stop Mode Recovery
Reset and Stop Mode Recovery
Z8 Encore!
Product Specification
on page 23.
®
F083A Series
Watchdog Timer
on
89
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