Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 147

• Manufacturer Part Number: Z8F083A0128ZCOG
• Description: KIT DEVELOPMENT F083A
• Manufacturer: Zilog
• Series: Z8 Encore! XP®r
• Type: MCUr

Specifications of Z8F083A0128ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F083A
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4672

PS026308-1207
Figure 19. Interfacing the On-Chip Debugger’s DBG Pin with an RS-232 Interface (2)
DEBUG Mode
The operating characteristics of the devices in DEBUG mode are:
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Entering DEBUG Mode
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Exiting DEBUG Mode
The device exits DEBUG mode following any of these operations:
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RS-232 TX
RS-232 RX
The eZ8 CPU fetch unit stops, idling the eZ8 CPU, unless directed by the OCD to execute
specific instructions.
The system clock operates, unless the device is in STOP mode.
All enabled on-chip peripherals operate, unless the device is in STOP mode.
Automatically exits HALT mode.
Constantly refreshes the Watchdog Timer, if enabled.
The device enters DEBUG mode after the eZ8 CPU executes a BRK (Breakpoint)
instruction.
If the DBG pin is held low during the most recent clock cycle of system reset, the device
enters DEBUG mode on exiting system reset
Clearing the DBGMODE bit in the OCD control register to 0.
Power-On Reset.
Voltage Brownout reset.
Watchdog Timer reset.
Transceiver
RS-232
Open-Drain
Buffer
VDD
10KOhm
Z8 Encore!
DBG Pin
Product Specification
®
On-Chip Debugger
F083A Series
135