Z8F083A0128ZCOG Zilog, Z8F083A0128ZCOG Datasheet - Page 132
![KIT DEVELOPMENT F083A](/photos/9/25/92520/z8f083a0128zcog_sml.jpg)
Z8F083A0128ZCOG
Manufacturer Part Number
Z8F083A0128ZCOG
Description
KIT DEVELOPMENT F083A
Manufacturer
Zilog
Series
Z8 Encore! XP®r
Type
MCUr
Specifications of Z8F083A0128ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F083A
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4672
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
Z8F083A0128ZCOG
Manufacturer:
Zilog
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Flash Option Bit Control Register Definitions
PS026308-1207
Note:
Option Bit Types
Trim Bit Address Register
User Option Bits
The user option bits are contained in the first two bytes of program memory. Your access
to these bits is provided because these locations contain application specific device
configurations. The information contained here is lost when page 0 of the program
memory is erased.
Trim Option Bits
The trim option bits are contained in the information page of the Flash memory. These bits
are factory programmed values required to optimize the operation of onboard analog
circuitry and cannot be permanently altered by you. Program memory may be erased
without endangering these values. It is possible to alter working values of these bits by
accessing the trim bit address and data registers, but these working values are lost after a
power loss.
There are 32-bytes of trim data. To modify one of these values, the user code must first
write a value between
trim bit data register changes the working value of the target trim data byte.
Reading the trim data requires the user code to write a value between
trim bit address register. The next read from the trim bit data register returns the working
value of the target trim data byte.
The trim address ranges from information address 20-3F only. The remainder of the
information page is not accessible through the trim bit address and data registers.
During reset, the first 43 system clock cycles perform 43 Flash accesses. The six bits of
the counter provide the lower six bits of the Flash memory address. All other address bits
are set to 0. The option bit registers use the 6-bit address from the counter as an address
and latch the data from the Flash on the positive edge of the IPO clock, allowing for a
maximum of 344-bits (43 bytes) of option information to be read from the Flash.
Because option information is stored in both the first two bytes of program memory and in
the information area of the Flash, the data must be placed in specific locations to be read
correctly. In this case, the first two bytes at address 0 and 1 in the program memory are
read out, and the rest of the bytes are read-out of the information part of the Flash.
This register contains the target address to access the trim option bits.Trim bit address
(00h-1Fh) maps to the information area address (20h to 3Fh) as listed in
00H
and
1FH
into the trim bit address register. The next write to the
Z8 Encore!
Product Specification
00H
®
and
F083A Series
Flash Option Bits
Table
1FH
into the
78.
120
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