MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 89
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 89 of 117
- Download datasheet (2Mb)
Freescale Semiconductor
L1_TSTCLK
L2_TSTCLK
LSSD_MODE
TEST_SEL
TEMP_ANODE
TEMP_CATHODE
ASLEEP
GND
OV
LV
TV
GV
BV
DD
DD
DD
DD
DD
[1:2]
[1:2]
[1:17]
Signal
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
AC20
AE17
AH19
AH13
Y3
AA3
AH17
D5, M10, F4, D26, D23, C12, C15, E20, D8,
B10, E3, J14, K21, F8, A3, F16, E12, E15, D17,
L1, F21, H1, G13, G15, G18, C6, A14, A7, G25,
H4, C20, J12, J15, J17, F27, M5, J27, K11, L26,
K7, K8, L12, L15, M14, M16, M18, N13, N15,
N17, N2, P5, P14, P16, P18, R13, R15, R17,
T14, T16, T18, U13, U15, U17, AA8, U6, Y10,
AC21, AA17, AC16, V4, AD7, AD18, AE23,
AF11, AF14, AG23, AH9, A27, B28, C27
Y16, AB7, AB10, AB13, AC6, AC18, AD9,
AD11, AE13, AD15, AD20, AE5, AE22, AF10,
AF20, AF24, AF27
R4, U3
N8, R10
B1, B11, C7, C9, C14, C17, D4, D6, R3, D15,
E2, E8,C24, E18, F5, E14, C21, G3, G7, G9,
G11, H5, H12, E22, F15, J10, K3, K12, K14,
H14, D20, E11, M1, N5
L23, J18, J19, F20, F23, H26, J21, J23
Table 62. MPC8544E Pinout Listing (continued)
Package Pin Number
Power and Ground Signals
Thermal Management
Power Management
DFT
Power for DDR1
local bus (1.8 V,
voltage (1.8 V,
Power for PCI
(2.5 V, 3.3 V)
(2.5 V, 3.3 V)
2.5 V, 3.3 V)
and DDR2
DRAM I/O
standards
interfaces
interfaces
Pin Type
and other
Power for
Power for
Power for
TSEC1
TSEC3
(3.3 V)
2.5 V)
—
—
—
O
I
I
I
I
Supply
Power
GV
OV
OV
OV
OV
OV
OV
BV
TV
LV
—
—
—
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Package Description
8, 15, 21
Notes
18
18
18
13
13
—
—
—
—
—
—
3
89
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