MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 36

• Manufacturer Part Number: MPC8544DS
• Description: BOARD DEVELOPMENT SYSTEM 8544
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8544DS

• Contents: Board
• Processor To Be Evaluated: MPC8544E
• Data Bus Width: 32 bit
• Interface Type: Ethernet, I2C
• Operating Supply Voltage: - 0.3 V to + 1.1 V
• Leaded Process Compatible: Yes
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MPC8544
• For Use With: PPC8544EVTANG - EVAL MPC8544 783FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet (eTSEC), MII Management
8.7.1
Table 34
Figure 19
8.7.2
Table 35
36
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%
At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%.
GTX_CLK clock period
GTX_CLK to TCG[9:0] delay time
GTX_CLK rise (20%–80%)
GTX_CLK fall time (80%–20%)
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. Data valid t
PMA_RX_CLK[0:1] clock period
PMA_RX_CLK[0:1] skew
inputs and t
transmit timing (TT) with respect to the time from t
state (V) or setup time. Also, t
high (H) until the referenced data signals (D) reach the invalid state (X) or hold time. Note that, in general, the clock reference
symbol representation is based on three letters representing the clock of a particular functional. For example, the subscript
of t
letter: R (rise) or F (fall).
delay).
TTX
represents the TBI (T) transmit (TX) clock. For rise and fall times, the latter convention is used with the appropriate
provides the TBI transmit AC timing specifications.
provides the TBI receive AC timing specifications.
shows the TBI transmit AC timing diagram.
TTKHDV
TBI Transmit AC Timing Specifications
TBI Receive AC Timing Specifications
Parameter/Condition
Parameter/Condition
(first two letters of functional block)(reference)(state)(signal)(state)
GTX_CLK
TCG[9:0]
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
to GTX_CLK Min setup time is a function of clock period and max hold time (Min setup = cycle time – Max
TTKHDX
Table 34. TBI Transmit AC Timing Specifications
Table 35. TBI Receive AC Timing Specifications
Figure 19. TBI Transmit AC Timing Diagram
t
TTXH
symbolizes the TBI transmit timing (TT) with respect to the time from t
t
TTKHDV
t
TTX
TTX
Symbol
Symbol
t
TTKHDX
t
(K) going high (H) until the referenced data signals (D) reach the valid
SKTRX
t
t
t
t
TTXR
TTXF
GTX
TRX
1
1
t
TTXF
(first two letters of functional block)(signal)(state )(reference)(state)
for outputs. For example, t
Min
Min
0.2
7.5
—
—
—
—
t
TTKHDX
t
TTXR
16.0
Typ
Typ
8.0
—
—
—
—
TTKHDV
Max
Max
5.0
1.0
1.0
8.5
—
—
Freescale Semiconductor
symbolizes the TBI
Unit
Unit
ns
ns
ns
ns
ns
ns
TTX
(K) going
Notes
Notes
—
—
—
—
—
2
for