DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 86

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

1–78
Glossary
Table 1–67. Glossary (Part 1 of 4)
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
Letter
A,
B,
C,
E,
D
F
Differential I/O
Standards
f
f
f
HSCLK
HSDR
HSDRDPA
Subject
Table 1–67
Receiver Input Waveforms
Transmitter Output Waveforms
Left/Right PLL input clock frequency.
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f
High-speed I/O block: Maximum/minimum LVDS data transfer rate
(f
HSDR
HSDRDPA
= 1/TUI), non-DPA.
Single-Ended Waveform
Differential Waveform
Single-Ended Waveform
Differential Waveform
= 1/TUI), DPA.
lists the glossary for this chapter.
V
V
CM
CM
V
V
OD
ID
V
V
OD
ID
Definitions
Chapter 1: Device Datasheet for Arria II Devices
V
V
OD
ID
p − n = 0 V
December 2010 Altera Corporation
p − n = 0 V
Positive Channel (p) = V
Negative Channel (n) = V
Ground
Positive Channel (p) = V
Negative Channel (n) = V
Ground
OH
IH
OL
IL
Glossary