DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 46

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

1–38
Table 1–39. Transmitter Pre-Emphasis Levels for Arria II GZ Devices (Part 2 of 2)
Table 1–40. Transceiver Block AC Specifications for Arria II GX Devices
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
SONET/SDH Transmit Jitter Generation
Peak-to-peak
jitter at
622.08 Mbps
RMS jitter at
622.08 Mbps
Peak-to-peak
jitter at
2488.32 Mbps
RMS jitter at
2488.32 Mbps
SONET/SDH Receiver Jitter Tolerance
Jitter tolerance at
622.08 Mbps
Emphasis
Post-Tap
Setting
Description
Pre-
1st
Symbol/
29
30
31
N/A
N/A
N/A
0
frequency =
frequency =
frequency =
Conditions
Pattern =
Pattern =
Pattern =
Pattern =
Pattern =
Pattern =
Pattern =
0.03 KHz
PRBS15
PRBS15
PRBS15
PRBS15
PRBS15
PRBS15
250 KHz
PRBS15
Table 1–40
25 KHZ
Jitter
Jitter
Jitter
N/A
N/A
N/A
1
lists the transceiver block AC specifications for Arria II GX devices.
Min
—
—
—
—
(2)
(2)
> 0.15
> 1.5
> 15
Typ
—
—
—
—
N/A
N/A
N/A
I3
2
0.01
0.01
Max
0.1
0.1
12.5
N/A
N/A
Min
3
—
—
—
—
V
OD
Setting
> 0.15
> 1.5
Typ
—
—
> 15
—
—
C4
11.4
12.9
9.6
(Note 1)
4
Max
0.01
0.01
0.1
0.1
Chapter 1: Device Datasheet for Arria II Devices
Min
(Part 1 of 13)
—
—
—
—
7.7
10
5
9
C5, I5
> 0.15
Typ
> 1.5
—
—
—
—
> 15
December 2010 Altera Corporation
Max
0.01
0.01
0.1
0.1
6.3
7.4
8.2
Switching Characteristics
6
Min
—
—
—
—
> 0.15
Typ
> 1.5
—
—
—
—
> 15
C6
N/A
N/A
4.3
7
Max
0.01
0.01
0.1
0.1
Unit
UI
UI
UI
UI
UI
UI
UI