DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 71

KIT DEV ARRIA II GX FPGA 2AGX125

DK-DEV-2AGX125N

Manufacturer Part Number
DK-DEV-2AGX125N
Description
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer
Altera
Series
Arria II GXr
Type
FPGAr

Specifications of DK-DEV-2AGX125N

Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Arria
Silicon Core Number
EP2
Silicon Family Name
Arria II GX
Rohs Compliant
Yes
For Use With/related Products
EP2AGX125EF35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2600

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DK-DEV-2AGX125N
Manufacturer:
Altera
Quantity:
135
Part Number:
DK-DEV-2AGX125N
Manufacturer:
ALTERA
0
Chapter 1: Device Datasheet for Arria II Devices
Switching Characteristics
Table 1–47. DSP Block Performance Specifications for Arria II GZ Devices
Table 1–48. Embedded Memory Block Performance Specifications for Arria II GX Devices
December 2010 Altera Corporation
Double mode
Notes to
(1) Maximum is for fully pipelined block with Round and Saturation disabled.
(2) Maximum for loopback input registers disabled, Round and Saturation disabled, and pipeline and output registers enabled.
Memory
Logic
Array
Block
(MLAB)
M9K
Block
Memory
Table
Single port 64 × 10
Simple dual-port 32 × 20 single
clock
Simple dual-port 64 × 10 single
clock
Single-port 256 × 36
Single-port 256 × 36, with the
read-during-write option set to
Old Data
Simple dual-port 256 × 36 single
CLK
Single-port 256 × 36 single CLK,
with the read-during-write option
set to Old Data
True dual port 512 × 18 single CLK
True dual-port 512 × 18 single CLK,
with the read-during-write option
set to Old Data
Min Pulse Width (clock high time)
Min Pulse Width (clock low time)
1–47:
Mode
Embedded Memory Block Specifications
Table 1–48
Mode
lists the embedded memory block specifications for Arria II GX devices.
Multipliers
Resources
Number of
Used
1
ALUTs
Resources Used
0
0
0
0
0
0
0
0
0
Embedded
Memory
1
1
1
1
1
1
1
1
1
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
440
–3
450
270
428
360
250
360
250
360
250
900
730
I3
(Note 1)
Performance
690
500
500
500
400
280
400
280
400
280
850
C4
Performance
C5,I5
450
450
450
360
250
360
250
360
250
950
770
380
–4
1130
378
378
378
310
210
310
210
310
210
920
C6
MHz
Unit
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
Unit
ps
ps
1–63

Related parts for DK-DEV-2AGX125N