DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 33

• Manufacturer Part Number: DK-DEV-2AGX125N
• Description: KIT DEV ARRIA II GX FPGA 2AGX125
• Manufacturer: Altera
• Series: Arria II GXr
• Type: FPGAr

Specifications of DK-DEV-2AGX125N

• Contents: Board, Cables, CD, DVD, Power Supply
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Arria
• Silicon Core Number: EP2
• Silicon Family Name: Arria II GX
• Rohs Compliant: Yes
• For Use With/related Products: EP2AGX125EF35
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2600

Table 1–34. Transceiver Specifications for Arria II GX Devices (Part 5 of 7)
CDR LTR time
CDR minimum
T1b
LTD lock time
Data lock time
from rx_
freqlocked
Programmable
DC gain
Transmitter
Supported I/O
Standards
Data rate
V
Differential
on-chip
termination
resistors
Return loss
differential mode
(5)
(7)
(8)
OCM
Description
Symbol/
(6)
DC Gain
Setting = 0
DC Gain
Setting = 1
DC Gain
Setting = 2
0.65 V
setting
100
setting
PCIe
XAUI
Condition
—
—
—
—
—
Min
600
—
15
—
—
—
—
—
—
0
I3
100
650
100
Typ
—
—
—
—
0
3
6
4000
4000
6375
Max
75
—
—
—
—
—
—
Min
600
—
15
—
—
—
—
—
—
0
(Note 1)
625 MHz to 3.125 GHz: –10dB/decade slope
100
650
100
Typ
—
—
—
—
0
3
6
C4
312 MHz to 625 MHz: –10dB
1.5-V PCML
50 MHz to 1.25 GHz: –10dB
4000
4000
3750
Max
75
—
—
—
—
—
Min
600
—
15
—
—
—
—
—
—
0
C5 and I5
Typ
100
650
100
—
—
—
—
0
3
6
4000
4000
3750
Max
75
—
—
—
—
—
—
Min
600
—
15
—
—
—
—
—
—
0
100
650
100
Typ
—
—
—
—
0
3
6
C6
4000
4000
3125
Max
75
—
—
—
—
—
—
Mbps
Unit
mV
dB
dB
dB
µs
µs
ns
ns
