DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 83

• Manufacturer Part Number: DEMO9S08EL32
• Description: BOARD DEMO FOR 9S08 EL MCU
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S08EL32

• Contents: Evaluation Board
• Processor To Be Evaluated: MC9S08EL32
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 12 V
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08EL
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08EL32
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.5.1
Port A is controlled by the registers listed below.
6.5.1.1
6.5.1.2
Freescale Semiconductor
PTADD[7:6]
PTADD[3:0]
PTAD[7:6]
PTAD[3:0]
Reset:
Reset:
Field
Field
7:6
3:0
7:6
3:0
W
W
R
R
PTADD7
PTAD7
Port A Registers
Port A Data Register Bits — For port A pins that are inputs, reads return the logic level on the pin. For port A
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port A pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
Port A Data Register (PTAD)
0
Port A Data Direction Register (PTADD)
0
7
7
PTADD6
PTAD6
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
0
0
6
6
Figure 6-4. Port A Data Direction Register (PTADD)
Table 6-2. PTADD Register Field Descriptions
Table 6-1. PTAD Register Field Descriptions
Figure 6-3. Port A Data Register (PTAD)
0
0
0
0
5
5
0
0
0
0
4
4
Description
Description
PTADD3
PTAD3
3
0
3
0
PTADD2
PTAD2
Chapter 6 Parallel Input/Output Control
0
0
2
2
PTADD1
PTAD1
0
0
1
1
PTADD0
PTAD0
0
0
0
0
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