DEMO9S08EL32 Freescale Semiconductor, DEMO9S08EL32 Datasheet - Page 145

BOARD DEMO FOR 9S08 EL MCU

DEMO9S08EL32

Manufacturer Part Number
DEMO9S08EL32
Description
BOARD DEMO FOR 9S08 EL MCU
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets

Specifications of DEMO9S08EL32

Contents
Evaluation Board
Processor To Be Evaluated
MC9S08EL32
Data Bus Width
8 bit
Interface Type
RS-232, USB
Operating Supply Voltage
12 V
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08EL
Rohs Compliant
Yes
For Use With/related Products
MC9S08EL32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10.3.2
The ADCSC2 register is used to control the compare function, conversion trigger and conversion active
of the ADC module.
Freescale Semiconductor
ADTRG
ADACT
Field
1
7
6
Bits 1 and 0 are reserved bits that must always be written to 0.
Reset:
W
R
Status and Control Register 2 (ADCSC2)
Conversion Active — ADACT indicates that a conversion is in progress. ADACT is set when a conversion is
initiated and cleared when a conversion is completed or aborted.
0 Conversion not in progress
1 Conversion in progress
Conversion Trigger Select — ADTRG is used to select the type of trigger to be used for initiating a conversion.
Two types of trigger are selectable: software trigger and hardware trigger. When software trigger is selected, a
conversion is initiated following a write to ADCSC1. When hardware trigger is selected, a conversion is initiated
following the assertion of the ADHWT input.
0 Software trigger selected
1 Hardware trigger selected
ADACT
7
0
ADCH
01000
01001
01010
01011
01100
01101
01110
01111
MC9S08EL32 Series and MC9S08SL16 Series Data Sheet, Rev. 3
= Unimplemented or Reserved
ADTRG
Figure 10-5. Status and Control Register 2 (ADCSC2)
Table 10-4. ADCSC2 Register Field Descriptions
0
6
Figure 10-4. Input Channel Select (continued)
Input Select
ACFE
0
5
AD10
AD11
AD12
AD13
AD14
AD15
AD8
AD9
ACFGT
0
4
Description
0
0
3
Analog-to-Digital Converter (S08ADC10V1)
ADCH
11000
11001
11010
11011
11100
11101
11110
11111
0
0
2
R
0
1
1
Module disabled
Input Select
Reserved
V
V
AD24
AD25
AD26
AD27
REFH
REFL
R
0
0
1
145

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