DLP-2232M-G DLP Design Inc, DLP-2232M-G Datasheet - Page 5

• Manufacturer Part Number: DLP-2232M-G
• Description: MODULE USB ADAPTER FOR FT2232D
• Manufacturer: DLP Design Inc

Specifications of DLP-2232M-G

• Main Purpose: Interface, USB 2.0 to UART (RS232) Bridge
• Embedded: No
• Utilized Ic / Part: FT2232D
• Primary Attributes: Full Speed USB to High-Speed UART
• Secondary Attributes: Royalty-Free Drivers, 2K EEPROM
• Interface Type: USB
• Data Bus Width: 8 bit
• Operating Supply Voltage: 4.35 V to 5.25 V
• Product: Interface Modules
• For Use With/related Products: FT2232D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 813-1000

drivers regardless of the packet size. This can be used to optimize USB transfer speed for
applications that send small packets of data to the host PC.
• Programmable Receive Buffer Timeout
The TX buffer timeout is programmable over USB in 1ms increments from 1ms to
255ms, thus allowing the module to be better optimized for protocols requiring faster
response times from short data packets.
• Baud Rate Pre-Scaler Divisors
The DLP-2232M-G (UART mode) baud rate pre-scaler supports division by (n+0),
(n+0.125), (n+0.25), (n+0.375), (n+0.5), (n+0.625), (n+0.75) and (n+0.875) where n is an
integer between 2 and 16,384.
• USB 2.0 (full speed option)
An EEPROM based option allows the DLP-2232M-G to return a USB 2.0 device
descriptor as opposed to USB 1.1. Note: The device would be a USB 2.0 Full Speed
device (12Mb/s) as opposed to a USB 2.0 High Speed device (480Mb/s).
For more details on these features please see the FT232BM and FT245BM datasheets and
application notes.
In addition to the DLP-USB2xxM module features, the DLP-2232M-G incorporates the
following new features and interface modes:
• Enhanced Asynchronous Bit-Bang Interface
The DLP-2232M-G supports FTDI’s BM chip Bit Bang mode. In Bit Bang mode, the
eight FIFO data lines can be switched between FIFO interface mode and an 8-bit Parallel
IO port. Data packets can be sent to the device and they will be sequentially sent to the
interface at a rate controlled by an internal timer (equivalent to the baud rate prescaler).
With the DLP-2232M-G module, this mode has been enhanced so that the internal RD#
and WR# strobes are now brought out of the device which can be used to allow external
logic to be clocked by accesses to the Bit-Bang IO bus.
• Synchronous Bit-Bang Interface
With Synchronous Bit-Bang Mode, the device is only read when it is written to, as
opposed to asynchronously by the data rate generator. This makes it easier for the
controlling program to measure the response to an output stimulus, as the data returned is
synchronous to the output data.
• High Output Drive Level Capability
The IO interface pins can be made to drive out at 12 mA, instead of the normal 4 mA
allowing multiple devices to be interfaced to the bus.
Rev 1.6 (May 2009)
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DLP-2232M-G DLP Design, Inc.