MAX17080GTL+ Maxim Integrated Products, MAX17080GTL+ Datasheet - Page 45

• Manufacturer Part Number: MAX17080GTL+
• Description: IC CONTROLLER AMD SVI 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17080GTL+

• Applications: Controller, AMD SVI
• Voltage - Input: 2.7 ~ 5.5 V
• Number Of Outputs: 3
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

noise generated by the power components. Follow
these guidelines for good PCB layout:
• Keep the high-current paths short, especially at the
• Connect all analog grounds to a separate solid cop-
• Keep the power traces and load connections short.
• Connections for current limiting (CSP, CSN) and volt-
• Route high-speed switching nodes and driver traces
• Route the high-speed serial-interface signals (SVC,
• Keep the drivers close to the MOSFET, with the gate-
• When trade-offs in trace lengths must be made, it is
ground terminals. This is essential for stable, jitter-
free operation.
per plane; then connect the analog ground to the
GND pins of the controller. The following sensitive
components connect to analog ground: V
V
bypass capacitors, and the resistive connections
(ILIM12, OSC, TIME).
This is essential for high efficiency. The use of thick
copper PCBx (2oz vs. 1oz) can enhance full-load
efficiency by 1% or more. Correctly routing PCB
traces is a difficult task that must be approached in
terms of fractions of centimeters, where a single mΩ
of excess trace resistance causes a measurable effi-
ciency penalty.
age positioning (FBS, GNDS) must be made using
Kelvin-sense connections to guarantee the current-
sense accuracy. Place current-sense filter capacitors
and voltage-positioning filter capacitors as close as
possible to the IC.
away from sensitive analog areas (REF, V
FBDC, OUT3, etc.). Make all pin-strap control input
connections (SHDN, PGD_IN, OPTION) to analog
ground or V
SVD) in parallel, keeping the trace lengths identical.
Keep the SVC and SVD away from the high-current
switching paths.
drive traces (DL, DH, LX, and BST) short and wide to
minimize trace resistance and inductance. This is
essential for high-power MOSFETs that require low-
impedance gate drivers to avoid shoot-through cur-
rents.
preferable to allow the inductor charging path to be
made longer than the discharge path. For example, it
is better to allow some extra distance between the
input capacitors and the high-side MOSFET rather than
to allow distance between the inductor and the low-
side MOSFET or between the inductor and the output
filter capacitor.
DDIO
bypass capacitors, remote sense and GNDS
CC
rather than power ground or V
______________________________________________________________________________________
AMD 2-/3-Output Mobile Serial
CC
DD
, FBAC,
CC
.
and
1) Place the power components first, with ground ter-
2) Use multiple vias to connect the exposed backside to
3) Mount the MAX17080 close to the low-side
4) Group the gate-drive components (BST capacitors,
5) Make the DC-DC controller ground connections as
6) Connect the output power planes (V
minals adjacent (low-side MOSFET source, C
C
connections on the top layer with wide, copper-
filled areas. For the NB SMPS, place CIN3 and L3
as near as possible to the MAX17080, using multi-
ple vias to reduce inductance when connecting the
different layers.
the power ground plane (PGND) to allow for a low-
impedance path for the SMPS3 internal low-side
MOSFET.
MOSFETs. The DL gate traces must be short and
wide (50 mils to 100 mils wide if the MOSFET is 1in
from the driver IC).
V
MAX17080.
shown in the standard application circuit (Figure 2).
This diagram can be viewed as having three sepa-
rate ground planes: input/output ground, where all
the high-power components go; the power ground
plane, where the PGND, V
and driver IC ground connection go; and the con-
troller’s analog ground plane, where sensitive ana-
log components, the MAX17080’s AGND pin, and
V
ground plane (AGND) must meet the power ground
plane (PGND) only at a single point directly beneath
the IC. The power ground plane should connect to
the high-power output ground with a short, thick
metal trace from PGND to the source of the low-side
MOSFETs (the middle of the star ground).
and system ground planes) directly to the output
filter capacitor positive and negative terminals with
multiple vias. Place the entire DC-DC converter
circuit as close to the CPU as is practical.
CC
OUT
DD
bypass capacitor go. The controller’s analog
, and DL anode). If possible, make all these
bypass capacitor) together near the
VID Controller
DD
Layout Procedure
bypass capacitor,
CORE
, V
OUT3
IN
45
,
,