MAX17080GTL+ Maxim Integrated Products, MAX17080GTL+ Datasheet - Page 35

• Manufacturer Part Number: MAX17080GTL+
• Description: IC CONTROLLER AMD SVI 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17080GTL+

• Applications: Controller, AMD SVI
• Voltage - Input: 2.7 ~ 5.5 V
• Number Of Outputs: 3
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

When the OVP circuit detects an overvoltage fault in
core SMPSs, it immediately sets the fault latch and
forces the external low-side driver high on the faulted
SMPS. The nonfaulted SMPSs are also shut down by
turning on the internal passive discharge MOSFET. The
synchronous-rectifier MOSFETs of the faulted side are
turned on with 100% duty, which rapidly discharges the
output filter capacitor and forces the output low. If the
condition that caused the overvoltage (such as a short-
ed high-side MOSFET) persists, the battery fuse blows.
Toggle SHDN or cycle the V
0.5V to clear the fault latch and reactivate the controller.
When the core SMPSs are configured in combined mode,
the synchronous-rectifier MOSFETs of both phases are
turned on with 100% duty in response to an overvoltage
fault. Passive shutdown is initiated for the NB SMPS.
The NB SMPS has no OVP.
If any of the MAX17080 output voltages are 400mV
below the target voltage, the controller sets the fault
latch, shuts down all the SMPSs, and activates the
internal passive discharge MOSFET. Toggle SHDN or
cycle the V
fault latch and reactivate the controller.
If the V
assumes that there is not enough supply voltage to
make valid decisions and sets a fault latch. During a
UVLO fault, the controller shuts down all the SMPSs
immediately, and forces DL and DH low, and pulls
CSN1, CSN2, and OUT3 low through internal 20Ω dis-
charge FETs. If the V
(1.8V, typ), DL is forced low even if it was previously
high due to a latched overvoltage fault.
Toggle SHDN or cycle the V
0.5V to clear the fault latch and reactivate the controller.
If the V
troller assumes that there is not enough supply voltage
to make valid decisions and sets a UV fault latch.
During V
down all the SMPSs immediately, forces DL and DH
low, and pulls CSN1, CSN2, and OUT3 low through
internal 20Ω discharge FETs. If the V
POR threshold (1.8V, typ), DL is forced low even if it
was previously high due to a latched overvoltage fault.
Toggle SHDN or cycle the V
0.5V to clear the fault latch and reactivate the controller.
V
DDIO
V
CC
DDIO
CC
DDIO
voltage drops below 4.2V (typ), the controller
Undervoltage-Lockout (UVLO) Protection
Undervoltage-Lockout (UVLO) Protection
CC
voltage drops below 0.7V (typ), the con-
UVLO, as with UVP, the controller shuts
Output Undervoltage Protection (UVP)
power supply below 0.5V to clear the
______________________________________________________________________________________
CC
falls below the POR threshold
CC
CC
CC
power supply below
power supply below
power supply below
CC
falls below the
AMD 2-/3-Output Mobile Serial
The MAX17080 features a thermal fault protection
circuit. When the junction temperature rises above
+160°C, a thermal sensor sets the fault latch and shuts
down immediately, forcing DH and DL low and turning
on the 20Ω discharge FETs for all SMPSs. Toggle
SHDN or cycle the V
clear the fault latch and reactivate the controller after
the junction temperature cools by 15°C.
If the V
assumes that there is not enough input voltage for NB
SMPSs. If V
start, the NB SMPS is disabled and the internal target
voltage stays off. When the V
its UVLO rising threshold 2.6V (typ), NB goes through the
soft-start sequence with a 1mV/µs slew rate.
If V
the NB SMPS is stopped, the NB target is reset to 0
immediately, and PWRGD is forced low. When V
subsequently rises above the UVLO rising threshold
2.6V (typ), the NB SMPS restarts with 1mV/µs slew rate
to the previous DAC target.
The DH and DL drivers are optimized for driving moder-
ate-sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in notebook applications where a large V
differential exists. The high-side gate drivers (DH)
source and sink 2.2A, and the low-side gate drivers
(DL) source 2.7A and sink 8A. This ensures robust gate
drive for high-current applications. The DH floating
high-side MOSFET drivers are powered by internal
boost switch charge pumps at BST, while the DL syn-
chronous-rectifier drivers are powered directly by the
5V bias supply (V
Adaptive dead-time circuits monitor the DL and DH dri-
vers and prevent either FET from turning on until the
other is fully off. The adaptive driver dead time allows
operation without shoot-through with a wide range of
MOSFETs, minimizing delays and maintaining efficiency.
There must be a low-resistance, low-inductance path
from the DL and DH drivers to the MOSFET gates
for the adaptive dead-time circuits to work properly;
otherwise, the sense circuitry in the MAX17080 inter-
prets the MOSFET gates as “off” while charge actually
remains. Use very short, wide traces (50 mils to 100
mils wide if the MOSFET is 1in from the driver).
IN3
V
IN3
UVLO happens while the MAX17080 is running,
IN3
Other Fault Protection (Nonlatched)
voltage drops below 2.5V (typ), the controller
Undervoltage-Lockout (UVLO) Protection
IN3
Core SMPS MOSFET Gate Drivers
UVLO happens before or just after soft-
DD
).
VID Controller
CC
power supply below 0.5V to
IN3
Thermal Fault Protection
subsequently rises past
IN
- V
OUT
IN3
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