MAX17080GTL+ Maxim Integrated Products, MAX17080GTL+ Datasheet - Page 36

• Manufacturer Part Number: MAX17080GTL+
• Description: IC CONTROLLER AMD SVI 40-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX17080GTL+

• Applications: Controller, AMD SVI
• Voltage - Input: 2.7 ~ 5.5 V
• Number Of Outputs: 3
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 40-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Output: -

AMD 2-/3-Output Mobile Serial
VID Controller
Figure 10. Gate-Drive Circuit
The internal pulldown transistor that drives DL low is
robust, with a 0.25Ω (typ) on-resistance. This helps pre-
vent DL from being pulled up due to capacitive coupling
from the drain to the gate of the low-side MOSFETs
when the inductor node (LX) quickly switches from
ground to V
long inductive driver traces could require rising LX
edges that do not pull up the low-side MOSFET’s gate,
causing shoot-through currents. The capacitive coupling
between LX and DL created by the MOSFET’s gate-to-
drain capacitance (C
(C
exceed the following minimum threshold:
Typically, adding a 4700pF capacitor between DL and
power ground (C
MOSFETs, greatly reduces coupling. Do not exceed
22nF of total gate capacitance to prevent excessive
turn-off delays.
36
(R
(C
ISS
BST
NL
)* OPTIONAL—THE RESISTOR LOWERS EMI BY DECREASING
______________________________________________________________________________________
)* OPTIONAL—THE CAPACITOR REDUCES LX-TO-DL CAPACITIVE
- C
MAX17080
RSS
IN
), and additional board parasitics should not
. Applications with high input voltages and
THE SWITCHING NODE RISE TIME.
COUPLING THAT CAN CAUSE SHOOT-THROUGH CURRENTS.
V
NL
GS TH
PGND
BST
V
DH
DL
LX
DD
in Figure 10), close to the low-side
(
RSS
)
(R
C
), gate-to-source capacitance
>
BST
BYP
V
)*
IN
⎛
⎜
⎝
C
C
C
(C
RSS
ISS
BST
NL
)*
⎞
⎟
⎠
N
N
H
L
INPUT (V
L
IN
)
Alternatively, shoot-through currents can be caused by
a combination of fast high-side MOSFETs and slow low-
side MOSFETs. If the turn-off delay time of the low-side
MOSFET is too long, the high-side MOSFETs can turn
on before the low-side MOSFETs have actually turned
off. Adding a resistor less than 5Ω in series with BST
slows down the high-side MOSFET turn-on time, elimi-
nating the shoot-through currents without degrading the
turn-off time (R
high-side MOSFET also reduces the LX node rise time,
thereby reducing EMI and high-frequency coupling
responsible for switching noise.
The +12.5mV offset and the address change features
of the MAX17080 can be selectively enabled and dis-
abled by the OPTION pin setting. When the offset is
enabled, setting the PSI_L bit to 0 disables the offset,
reducing power consumption in the low-power state.
See the Core SMPS Offset section for a detailed
description of this feature.
In addition, the address of the core SMPSs can be
exchanged, allowing for flexible layout of the
MAX17080 with respect to the CPU placement on the
same or opposite sides of the PCB. Table 6 shows the
OPTION pin voltage levels and the features that are
enabled.
Note: VDD0 refers to CORE0 and VDD1 refers to CORE1 for
the AMD CPU.
The offset and current-limit settings of the NB SMPS
can be set by the ILIM3 pin setting. Table 7 shows the
ILIM3 pin voltage levels and the corresponding settings
for the offset and current limit of the NB SMPS. The NB
offset is always present regardless of PSI_L setting.
The I
mode is precisely 25% of the corresponding positive
current-limit threshold.
Table 6. OPTION Pin Settings
OPTION
GND
3.3V
V
2V
CC
LX3MIN
minimum current-limit threshold in skip
ENABLES
Offset and Current-Limit Setting
OFFSET
BST
0
0
1
1
Offset and Address Change
in Figure 10). Slowing down the
for Core SMPSs (OPTION)
BIT 1 (VDD0)
BIT 2 (VDD1)
BIT 1 (VDD0)
BIT 2 (VDD1)
ADDRESS
SMPS1
for NB SMPS (ILIM3)
BIT 2 (VDD1)
BIT 1 (VDD0)
BIT 2 (VDD1)
BIT 1 (VDD0)
ADDRESS
SMPS2