NCP5331FTR2G ON Semiconductor, NCP5331FTR2G Datasheet - Page 33

• Manufacturer Part Number: NCP5331FTR2G
• Description: IC CTLR PWM 2PH W/DRVRS 32-LQFP
• Manufacturer: ON Semiconductor

Specifications of NCP5331FTR2G

• Applications: Controller, AMD Athlon™
• Voltage - Input: 9 ~ 14 V
• Number Of Outputs: 2
• Voltage - Output: 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP5331FTR2G; NCP5331FTR2GOSTR

output inductor due to the 52 A load current being shared
equally between the two phases.
increase in the output inductor when the load is applied (i.e.,
Lo has decreased to 88% due to the dc current).
minimum input inductance value.
Micrometals (33.5 nH/N
requires only 1.28 turns to achieve the minimum inductance
value. We allow for inductance “swing” at full−load by
using three turns. The input inductor’s value will be
from Coiltronics.
5. MOSFET & Heatsink Selection
and for the lower MOSFETs we choose two (2) NTD80N02,
both are from ON Semiconductor. The following parameters
are derived from the data sheets.
Gate Drive Current
Upper Gate Voltage
Lower Gate Voltage
Gate Nonoverlap Time
First, use Equation 15 to calculate the voltage across the
Second, use Equation 16 to determine the rate of current
Finally, use Equation 17 and Equation 18 to calculate the
Next, choose the small, cost effective T30−26 core from
This inductor is available as part number CTX15−14771
For the upper MOSFET we choose two (1) NTD60N03
DV Lo + V IN * V CORE,NO−LOAD
Parameter
NCP5331 Parameter
Li MIN + DV Ci
Q
DV Ci + ESR IN N IN @ dI Lo dt @ D f SW
R
V
SWITCH
Q
DS(on)
Q
F,diode
q
dI Lo dt + DV Lo Lo
OSS
JC
RR
+ 12 V * 1.575 V ) 52 A 2 @ 19 mW 6
+ 10.51 V
+ 28 mV 0.50 A ms + 55 nH
+ 13 mW 5 @ 14.4 V ms @ 0.146 200 kHz
+ 28 mV
L i + 3 2 @ 33.5 nH N 2 + 301 nH
) (I O,MAX 2) @ ESR OUT N OUT
+ 10.51 V 729 nH + 14.4 V ms
8.0 mW @ 6.5 V
dI IN dt MAX
0.75 V @ 2.3 A
NTD60N03
1.65 C/W
2
27 nC
43 nC
12 nC
) with #16 AWG. The design
1.5 A for 1.0 ms
11.5 V
Value
65 ns
6.5 V
5.0 mW @ 10 V
0.92 V @ 20 A
NTD80N02
1.65 C/W
26 nC
36 nC
12 nC
http://onsemi.com
(15)
(16)
(17)
(18)
NCP5331
33
calculated from Equation 20 and the previously derived
values for D, I
output current.
I RMS,CNTL + [D @ (I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN
the control MOSFET but has been modified for one upper
and two lower MOSFETs.
P D,CONTROL + { (I RMS,CNTL 2 ) @ R DS(on) }
is calculated from Equation 27 and the previously derived
values for D, I
maximum output current.
I RMS,SYNCH + [(1 * D) @
each synchronous MOSFET. Note: The rms current is
shared by the two lower MOSFETs so the total rms current
is divided by two in the following equation. Also, during the
nonoverlap time, the per−phase current is shared by two
body diodes so the full load current is divided between two
phases and two forward body diodes per phase.
+ (1 * 0.097) @ [(29.6 2 ) 29.6 @ 22.4 ) 22.4 2 ) 3] 1 2
+ 23.5 A RMS (shared by two synchronous MOSFETs)
P D,SYNCH + (I RMS,SYNCH 2 @ R DS(on) )
The rms value of the current in the control MOSFET is
Equation 19 is used to calculate the power dissipation of
The rms value of the current in the synchronous MOSFET
Equation 26 is used to calculate the power dissipation of
(I Lo,MAX 2 ) I Lo,MAX @ I Lo,MIN ) I Lo,MIN 2 ) 3] 1 2
+ { 2.53 2 A RMS @ 8.0 mW }
+ 0.051 W ) 1.28 W ) 0.043 W ) 0.10 W
+ 1.48 W per FET
+ (23.5 2) 2 A RMS @ 5.0 mW
+ 0.69 W ) 0.16 W + 0.85 W per FET
) (I Lo,MAX @ Q switch I g @ V IN @ f SW )
) (3 @ Q oss 2 @ V IN @ f SW ) ) (V IN @ Q RR @ f SW )
+ 0.097 @ [(29.6 2 ) 29.6 @ 22.4 ) 22.4 2 ) 3] 1 2
+ 2.53 A RMS
) (Vf diode @ I O,MAX 2 @ t_nonoverlap @ f SW )
) (29.6 A @ 27 nC 1.5 A @ 12 V @ 200 kHz)
) (3 @ 12 nC 2 @ 12 V @ 200 kHz)
) (12 V @ 43 nC @ 200 kHz)
) 0.92 V @ (52 A 2 2) @ 65 ns @ 200 kHz
LMAX
Lo,MAX
, and I
) I Lo,MIN 2 ) 3] 1 2
, and I
LMIN
at the converter’s maximum
Lo,MIN
at the converter’s
(20)
(19)
(27)
(26)