NCP5331FTR2G ON Semiconductor, NCP5331FTR2G Datasheet - Page 22

• Manufacturer Part Number: NCP5331FTR2G
• Description: IC CTLR PWM 2PH W/DRVRS 32-LQFP
• Manufacturer: ON Semiconductor

Specifications of NCP5331FTR2G

• Applications: Controller, AMD Athlon™
• Voltage - Input: 9 ~ 14 V
• Number Of Outputs: 2
• Voltage - Output: 5V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: NCP5331FTR2G; NCP5331FTR2GOSTR

Power Dissipation
following equation:
where:
F
V
V
between 5.0 and 12 V
V
and 7.0 V
V
12 V
SW
in
CCL
CCLx
CCH
NCP5331 power dissipation may be approximated by the
is the input voltage to the converter and is either 5.0 or
P loss + F SW · (V CCH · Q THighFETs
P Quiescent + V CCL · I CCL ) 2 · V CCLx ·I CCLx
is the switching frequency
is 12 V
is the high−side gate drive voltage and is between 4.5
is the low−side gate drive voltage and may be varied
) V CCLx · Q TLowFETs ) ) P Quiescent
) (V CCH ) V in ) · I CCH
84
81
78
75
72
69
66
63
60
57
54
51
48
45
42
39
36
33
30
27
24
Figure 29. Calculated NCP5331 temperature rise (LQFP−32 package)
versus frequency at various typical gate drive voltage combinations
V
V
1 Low−Side FETS
CCH
CCLx
100
= 4.5 V;
= 12 V;
V
V
2 Low−Side FETS
with typical ON Semiconductor MOSFets.
CCH
CCLx
150
= 4.5 V;
= 12 V;
http://onsemi.com
V
V
2 Low−Side FETS
FREQUENCY (kHz)
200
CCH
CCLx
NCP5331
= 7.0 V;
= 12 V;
22
I
can be found under the General Electrical Specifications.
Q
charge
Q
charge
frequency at various gate drive voltage combinations using
ON Semiconductor’s NTD60N03 (Qt = 31nC at 5.0 V) as
the high−side MOSFet and NTD80N02 (Qt = 39nC at 7.0 V)
as the low−side MOSFet. Using other MOSFets will of
course result in different losses, but the general conclusion
will be the same.
than 200 KHz, it may be necessary to reduce the low−side
gate drive voltage.
CCL
THighFETs
TLowFETs
Figure 29 shows device temperature rise versus switching
If trying to drive 2 lower MOSFets at frequencies higher
250
, I
CCLx
is the sum of the Low−Side MOSFets total gate
, I
is the sum of the High−Side MOSFets total gate
V
V
2 Low−Side FETS
CCH
CCH
CCLx
300
are typical device quiescent currents and
4.5 V;
= 12 V;
V
V
1 Low−Side FETS
V
V
2 Low−Side FETS
CCH
CCLx
CCH
CCLx
= 7.0 V;
= 12 V;
= 7.0 V;
= 12 V;
350