IDT7130SA55P IDT, Integrated Device Technology Inc, IDT7130SA55P Datasheet - Page 4

• Manufacturer Part Number: IDT7130SA55P
• Description: IC SRAM 8KBIT 55NS 48DIP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: -r

Specifications of IDT7130SA55P

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 8K (1K x 8)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-DIP
• Density: 8Kb
• Access Time (max): 55ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 5V
• Address Bus: 20b
• Package Type: PDIP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 155mA
• Operating Supply Voltage (min): 4.5V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 48
• Word Size: 8b
• Number Of Words: 1K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 7130SA55P

IDT7130SA/LA AND IDT7140SA/LA
HIGH-SPEED 1K x 8 DUAL-PORT STATIC RAM WITH INTERRUPTS
NOTES:
1. 'X' in part numbers indicates power rating (SA or LA).
2. Com'l Only, 0 C to +70 C temperature range. PLCC and TQFP packages.
3. Not available in DIP packages.
4. At f = f
5. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
6. Vcc = 5V, T
7. Port "A" may be either left or right port. Port "B" is opposite from port "A".
NOTES:
1. V
2. t
3. This parameter is guaranteed but not production tested.
DC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE
DATA RETENTION CHARACTERISTICS
Symbol
Symbol
I
I
I
I
of input levels of GND to 3V.
I
SB1
SB2
SB3
SB4
V
I
t
t
RC
CC
CCDR
CDR
R
CC
DR
(3)
= Read Cycle Time
= 2V, T
(3)
Max
Dynamic Operating
Current (Both Ports
Active)
Standby Current
(Both Ports - TTL
Level Inputs)
Standby Current
(One Port - TTL
Level Inputs)
Full Standby Current
(Both Ports - All
CMOS Level Inputs
Full Standby Current
(One Port - All
CMOS Level Inputs)
, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/t
A
A
=+25 C for Typ and is not production tested. Vcc
Parameter
= +25 C, and is not production tested.
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery
Time
CC
Parameter
for Data Retention
CE
Outputs open,
f = f
CE
f = f
CE
Active Port Outputs COM'L. SA
Open, f = f
CE
CE
V
V
CE
CE
V
V
Active Port Outputs
Open, f = f
CE
Test Conditions
IN
IN
IN
IN
L
L
"
L
R
"
"
"
B
A
B
A
MAX
MAX
> V
< 0.2V,f = 0
> V
< 0.2V,
and
and
and
"
> V
"
"
"
=
=
> V
<
V
CC
CC
(4)
(4)
V
V
V
0.2V and
CC
IH
CE
CE
IL
CC
CC
IN
-0.2V or
-0.2V or
MAX
and
(7)
MAX
-0.2V,
> V
R
R
= 2.0V,
-0.2V
= V
= V
(4)
(4)
CC
(5)
IL
IH
(7)
-0.2V or V
Test Conditions
, MIL.
, MIL.
CE
COM'L. SA
COM'L. SA
MIL.
MIL.
COM'L. SA
MIL.
COM'L. SA
(LA Version Only)
Version
> V
DC
= 100 mA (Typ.)
CC
IN
SA
SA
SA
SA
SA
LA
LA
LA
LA
LA
LA
LA
LA
LA
LA
-0.2V
< 0.2V
6.01
7130X20
Typ. Max. Typ. Max. Typ. Max. Typ. Max. Typ. Max. Unit
110 250 110 220
110 200 110 170
1.0
0.2
30
30
65
65
60
60
—
—
—
—
—
—
—
—
—
—
Mil.
Com’l.
165
125
155
115
65
—
—
—
—
45
—
—
—
—
15
—
—
5
(2)
7130X25
7140X25
110 280
110 220
1.0
0.2
1.0
0.2
MILITARY AND COMMERCIAL TEMPERATURE RANGES
30
30
30
30
65
65
65
65
60
60
60
60
145
160
125
150
115
155
115
105
80
60
65
45
30
10
15
5
(1,6)
(3)
(3)
Min.
2.0
t
lDT7130LA/IDT7140LA
—
—
RC
0
110 230
110 170
110 165
110 120
(V
1.0
0.2
1.0
0.2
7130X35
7140X35
25
25
25
25
50
50
50
50
45
45
45
45
(2)
CC
150
115
145
105
110
125
= 5.0V
80
60
65
45
90
85
30
10
15
RC
4
Typ.
, and using “AC TEST CONDITIONS”
100
100
—
—
—
7130X55
7140X55
110 155
110 190
110 140
110 110
1.0
0.2
1.0
0.2
20
40 100
(1)
20
20
20
40 125
40
40 110
40
40 110
40
40
10%)
65
45
65
35
90
75
30
10
15
85
70
4
Max.
4000
1500
—
—
—
110 190
110 140
110 155
110 110
7130X100
7140X100
1.0
0.2
1.0
0.2
20
20
20
20
40
40
40
40
40
40
40
40
125
110
110
55
95
70
65
45
35
90
75
30
10
15
80
4
Unit
2689 tbl 06
2689 tbl 07
ns
ns
V
A
A
mA
mA
mA
mA
mA
4