MT46H16M16LFBF-6 IT:A Micron Technology Inc, MT46H16M16LFBF-6 IT:A Datasheet - Page 15

• Manufacturer Part Number: MT46H16M16LFBF-6 IT:A
• Description: IC DDR SDRAM 256MBIT 60VFBGA
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46H16M16LFBF-6 IT:A

• Format - Memory: RAM
• Memory Type: Mobile DDR SDRAM
• Memory Size: 256M (16Mx16)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.95 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 60-VFBGA
• Organization: 16Mx16
• Density: 256Mb
• Address Bus: 15b
• Access Time (max): 6.5/5ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 100mA
• Pin Count: 60
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Compliant
• Other names: Q3368612

Register Definition
Mode Registers
Standard Mode Register
Burst Length
Burst Type
PDF: 09005aef82091978 / Source: 09005aef8209195b
MT46H16M16LF__2.fm - Rev. H 6/08 EN
10. Issue NOP or DESELECT commands for at least
7. Using the LOAD MODE REGISTER command, load the standard mode register as
8. Issue a NOP or DESELECT command for at least
9. Using the LOAD MODE REGISTER command, load the extended mode register to the
The Mobile DDR SDRAM has been properly initialized and is ready to receive any valid
command.
The mode registers are used to define the specific mode of operation of the Mobile DDR
SDRAM. Two mode registers are used to specify the operational characteristics of the
device.
The standard mode register bit definition enables the selection of burst length, burst
type, CAS latency, and operating mode, as shown in Figure 6 on page 16. Reserved states
should not be used, as this may result in setting the device into an unknown state or
cause incompatibility with future versions of Mobile DDR SDRAM. The standard mode
register is programmed via the LOAD MODE REGISTER command (with BA0 = 0 and
BA1 = 0) and will retain the stored information until it is programmed again, the device
goes into deep power-down mode, or the device loses power.
Reprogramming the mode register will not alter the contents of the memory, provided it
is performed correctly. The mode register must be loaded when all banks are idle and no
bursts are in progress, and the controller must wait before initiating the subsequent
operation. Violating any of these requirements will result in unspecified operation.
Read and write accesses to the Mobile DDR SDRAM are burst oriented; the burst length
is programmable. The burst length determines the maximum number of column loca-
tions that can be accessed for a given READ or WRITE command. Burst lengths of 2, 4, or
8 locations are available for both sequential and interleaved burst types.
When a READ or WRITE command is issued, a block of columns equal to the burst
length is effectively selected. All accesses for that burst take place within this block,
meaning that the burst will wrap when a boundary is reached. The block is uniquely
selected by A1–Ai when BL = 2, by A2–Ai when BL = 4, and by A3–Ai when BL = 8, where
Ai is the most significant column address bit for a given configuration. The remaining
(least significant) address bits are used to specify the starting location within the block.
The programmed burst length applies to both READ and WRITE bursts.
Accesses within a given burst may be programmed either to be sequential or interleaved
via the standard mode register.
The ordering of accesses within a burst is determined by the burst length, the burst type,
and the starting column address (see Table 5 on page 17).
desired.
desired operating modes. Note that the sequence in which the standard and extended
mode registers are programmed is not critical.
15
Micron Technology, Inc., reserves the right to change products or specifications without notice.
256Mb: x16, x32 Mobile DDR SDRAM
t
t
MRD time.
MRD time.
©2005 Micron Technology, Inc. All rights reserved.
Register Definition