DK-DEV-5AGTD7N Altera Corporation, DK-DEV-5AGTD7N Datasheet - Page 46
DK-DEV-5AGTD7N
Manufacturer Part Number
DK-DEV-5AGTD7N
Description
Programmable Logic IC Development Tools FPGA Development Kit For 5AGTD7K3F40I3N
Manufacturer
Altera Corporation
Type
FPGAr
Datasheet
1.DK-DEV-5AGTD7N.pdf
(58 pages)
Specifications of DK-DEV-5AGTD7N
Rohs
yes
Product
Development Kits
Tool Is For Evaluation Of
5AGTD7K3
Interface Type
FMC, HSMC, PCIe, USB
For Use With
5AGTD7K3
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- Download datasheet (3Mb)
6–24
Arria V GT FPGA Development Kit
User Guide
The Power Monitor communicates with the MAX II device on the board through the
JTAG bus. A power monitor circuit attached to the MAX II device allows you to
measure the power that the Arria V GT FPGA is consuming.
Power Monitor.
Figure 6–10. The Power Monitor
The following sections describe the Power Monitor controls.
General Information
The General information controls display the following information about the
MAX II device:
■
■
MAX II Version—Indicates the version of MAX II code currently running on the
board. The MAX II code resides in the <install
dir>\kits\arriaVGT_5agtfd7kf40_fpga\factory_recovery and <install
dir>\kits\arriaVGT_5agtfd7kf40_fpga\examples\max2 directories. Newer
revisions of this code might be available on the
Kit
Power Rail—Selects the power rail to measure. After selecting the desired rail,
click Reset to refresh the screen with new board readings.
page of the Altera website.
Arria V GT FPGA Development
November 2012 Altera Corporation
Figure 6–10
Chapter 6: Board Test System
The Power Monitor
shows the
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