DK-DEV-5AGTD7N Altera Corporation, DK-DEV-5AGTD7N Datasheet - Page 37

• Manufacturer Part Number: DK-DEV-5AGTD7N
• Description: Programmable Logic IC Development Tools FPGA Development Kit For 5AGTD7K3F40I3N
• Manufacturer: Altera Corporation
• Type: FPGAr

Specifications of DK-DEV-5AGTD7N

• Rohs: yes
• Product: Development Kits
• Tool Is For Evaluation Of: 5AGTD7K3
• Interface Type: FMC, HSMC, PCIe, USB
• For Use With: 5AGTD7K3

Chapter 6: Board Test System
Using the Board Test System
Figure 6–7. The HSMB/FMC Tab
November 2012 Altera Corporation
The HSMB/FMC Tab
1
The HSMB/FMC tab
and CMOS
You must have the loopback HSMB installed on the HSMC Port B connector that you
are testing for this test to work correctly.
The following sections describe the controls on the HSMB/FMC tab.
Status
The Status control displays the following status information during the loopback test:
■
■
■
PLL lock—Shows the PLL locked or unlocked state.
Channel lock—Shows the channel locked or unlocked state. When locked, all
lanes are word aligned and channel bonded.
Pattern sync—Shows the pattern synced or not synced state. The pattern is
considered synced when the start of the data sequence is detected.
ports.
(Figure
6–7) allows you to perform loopback tests on the XCVR
Arria V GT FPGA Development Kit
User Guide
6–15