DK-DEV-5AGTD7N Altera Corporation, DK-DEV-5AGTD7N Datasheet - Page 21

• Manufacturer Part Number: DK-DEV-5AGTD7N
• Description: Programmable Logic IC Development Tools FPGA Development Kit For 5AGTD7K3F40I3N
• Manufacturer: Altera Corporation
• Type: FPGAr

Specifications of DK-DEV-5AGTD7N

• Rohs: yes
• Product: Development Kits
• Tool Is For Evaluation Of: 5AGTD7K3
• Interface Type: FMC, HSMC, PCIe, USB
• For Use With: 5AGTD7K3

Connecting to the Board Update Portal Web Page
November 2012 Altera Corporation
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The Arria V GT FPGA Development Kit ships with the Board Update Portal design
example stored in the factory portion of the flash memory on the board. The design
consists of a Nios II embedded processor, an Ethernet MAC, and an HTML web
server.
When you power up the board with the Load Selector (SW5.3) in the on (factory)
position, the Arria V GT FPGA configures with the Board Update Portal design
example. The design can obtain an IP address from any DHCP server and serve a web
page from the flash on your board to any host computer on the same network. The
web page allows you to upload new FPGA designs to the user hardware 1 and
hardware 2 portion of flash memory and provides useful kit-specific links and design
resources.
After successfully updating the user hardware 1 and/or hardware 2 flash memory,
you can load the user design from flash memory into the FPGA. To do so, set the Load
Selector (SW5.3) to the off (user) position and power cycle the board. (The design
stored in user hardware 1 is used to configure FPGA 1 when the board is power
cycled.) To configure FPGA 1 with the design stored in user hardware 2, push and
release the PGM1 (S2) push button the required number of times until PGM2 LED
lights and then push PGM_CONF (S3) to configure the FPGA.
The source code for the Board Update Portal design resides in the <install
dir>\kits\arriaVGT_5agtfd7kf40_fpga\examples directory. If the Board Update
Portal is corrupted or deleted from the flash memory, refer to
Device to the Factory Settings” on page A–4
factory contents.
This section provides instructions to connect to the Board Update Portal web page.
Before you proceed, ensure that you have the following:
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To connect to the Board Update Portal web page, perform these steps:
1. With the board powered down, set the Load Selector (SW5.3) to the on (factory)
2. Attach the Ethernet cable from the board to your LAN.
3. Power up the board. The board connects to the LAN’s gateway router and obtains
A PC with a connection to a working Ethernet port on a DHCP enabled network.
A separate working Ethernet port connected to the same network for the board.
The Ethernet and power cables that are included in the kit.
position.
an IP address. The LCD on the board displays the IP address.
to restore the board with its original
5. Board Update Portal
“Restoring the Flash
Arria V GT FPGA Development Kit
User Guide