DK-DEV-5AGTD7N Altera Corporation, DK-DEV-5AGTD7N Datasheet - Page 34
DK-DEV-5AGTD7N
Manufacturer Part Number
DK-DEV-5AGTD7N
Description
Programmable Logic IC Development Tools FPGA Development Kit For 5AGTD7K3F40I3N
Manufacturer
Altera Corporation
Type
FPGAr
Datasheet
1.DK-DEV-5AGTD7N.pdf
(58 pages)
Specifications of DK-DEV-5AGTD7N
Rohs
yes
Product
Development Kits
Tool Is For Evaluation Of
5AGTD7K3
Interface Type
FMC, HSMC, PCIe, USB
For Use With
5AGTD7K3
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6–12
Figure 6–6. The SFP/SMA/C2C Tab
Arria V GT FPGA Development Kit
User Guide
The SFP/SMA/C2C Tab
1
The SFP/SMA/C2C tab
respective transceiver interfaces on FPGA 1.
To run the SFP+ designs using this GUI, use the USER1_DIPSW to enable or disable
SFP lasers. To turn the SFP_A laser on, ensure that USER1_DIPSW[4] is in the OFF
position (toward the HSMC connector). To turn on the SFP_B laser, ensure that
USER1_DIPSW[5] is in the OFF position.
The following sections describe the controls on the SFP/SMA/C2C tab.
Status
The Status control displays the following status information during the loopback test:
■
■
PLL lock—Shows the PLL locked or unlocked state.
Channel lock—Shows the channel locked or unlocked state. When locked, all
lanes are word aligned and channel bonded.
(Figure
6–6) allows you to run test designs using the
November 2012 Altera Corporation
Chapter 6: Board Test System
Using the Board Test System
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