XRT83L34ES Exar, XRT83L34ES Datasheet - Page 79
XRT83L34ES
Manufacturer Part Number
XRT83L34ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L34ES.pdf
(99 pages)
Specifications of XRT83L34ES
Product Category
Peripheral Drivers & Components - PCIs
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QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
R
R
EGISTER
EGISTER
0001010
0011010
0101010
0001011
0101011
0111010
0011011
0111011
D6-D0
D6-D0
B
B
D7
D7
IT
IT
A
A
#
#
DDRESS
DDRESS
C
C
C
C
C
C
C
C
C
C
Reserved
Reserved
B6S3_n -
B6S4_n -
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
B0S3_n
B0S4_n
N
N
AME
AME
T
T
ABLE
ABLE
_n
_0
_1
_2
_3
_n
_0
_1
_2
_3
30: M
31: M
Arbitrary Transmit Pulse Shape, Segment 3
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the third time segment. B6S3_n-
B0S3_n is in signed magnitude format with B6S3_n as the
sign bit and B0S3_n as the least significant bit (LSB).
Arbitrary Transmit Pulse Shape, Segment 4
The shape of each channel's transmitted pulse can be made
independently user programmable by selecting “Arbitrary
Pulse” mode in
eight time segments whose combined duration is equal to one
period of MCLK.
This 7 bit number represents the amplitude of the nth chan-
nel's arbitrary pulse during the fourth time segment. B6S4_n-
B0S4_n is in signed magnitude format with B6S4_n as the
sign bit and B0S4_n as the least significant bit (LSB).
ICROPROCESSOR
ICROPROCESSOR
Table 5
Table 5
R
R
76
. The arbitrary pulse is divided into
. The arbitrary pulse is divided into
EGISTER
EGISTER
F
F
UNCTION
UNCTION
#10, B
#11, B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
R
R
EGISTER
EGISTER
T
T
R/W
R/W
R/W
R/W
YPE
YPE
XRT83L34
REV. 1.0.1
R
V
R
V
ALUE
ALUE
ESET
ESET
0
0
0
0
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