XRT83L34ES Exar, XRT83L34ES Datasheet - Page 77

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XRT83L34ES

Manufacturer Part Number
XRT83L34ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet

Specifications of XRT83L34ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
xr
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
R
EGISTER
0000111
0010111
0100111
0110111
B
D7
D6
D5
D4
D3
D2
D1
D0
IT
A
#
DDRESS
C
C
C
C
C
Reserved
Reserved
CLOS5_n
CLOS4_n
CLOS3_n
CLOS2_n
CLOS1_n
CLOS0_n
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
N
AME
T
ABLE
_n
_0
_1
_2
_3
27: M
Cable Loss bit 5: CLOS[5:0]_n are the six bit receive selec-
tive equalizer setting which is also a binary word that repre-
sents the cable attenuation indication within ±1dB. CLOS5_n
is the most significant bit (MSB) and CLOS0_n is the least sig-
nificant bit (LSB).
Cable Loss bit 4: See description of D5 for function of this bit.
Cable Loss bit 3: See description of D5 for function of this bit.
Cable Loss bit 2: See description of D5 for function of this bit.
Cable Loss bit 1: See description of D5 for function of this bit.
Cable Loss bit 0: See description of D5 for function of this bit.
ICROPROCESSOR
74
R
EGISTER
F
UNCTION
#7, B
IT
D
ESCRIPTION
R
EGISTER
T
RO
RO
RO
RO
RO
RO
RO
RO
YPE
XRT83L34
REV. 1.0.1
R
V
ALUE
ESET
0
0
0
0
0
0
0
0

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