XRT83L34ES Exar, XRT83L34ES Datasheet - Page 41
XRT83L34ES
Manufacturer Part Number
XRT83L34ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L34ES.pdf
(99 pages)
Specifications of XRT83L34ES
Product Category
Peripheral Drivers & Components - PCIs
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xr
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
TRANSMITTER (CHANNELS 0 - 3)
T
In Hardware mode, TXTSEL (Pin 84) can be tied “High” to select internal termination mode for all transmit
channels or tied “Low” for external termination. Individual channel control can be done only in Host mode. In
Host mode, bit 6 in the appropriate register for a given channel is set “High” to select the internal termination
mode for that specific transmit channel, see
page
For internal termination, the transformer turns ratio is always 1:2. In internal mode, no external resistors are
used. An external capacitor of 0.68µF is used for proper operation of the internal termination circuitry, see
Figure
E
By default the XRT83L34 is set for external termination mode at power up or at Hardware reset.
When external transmit termination mode is selected, the internal termination circuitry is disabled. The value of
the external resistors is chosen for a specific application according to the turns ratio selected by TRATIO (Pin
127) in Hardware mode or bit 0 in the appropriate register for a specific channel in Host mode, see
and
diagram for T1 (100Ω) in the external termination mode.
the external termination mode.
RANSMIT
XTERNAL
Table 23, “Microprocessor Register #3, Bit Description,” on page
64.
13.
T
T
ERMINATION
RANSMIT
F
IGURE
T
15. S
ERMINATION
M
TXTSEL
X R T 8 3 L 3 4 L IU
ODE
IMPLIFIED
0
1
TERSEL1
T R IN G
R R IN G
T
M
T T IP
R T IP
T
ABLE
0
0
1
1
ODE
ABLE
D
IAGRAM FOR
8: T
9: T
RANSMIT
ERMINATION
7 5
TX TERMINATION
TERSEL0
Table 21, “Microprocessor Register #1, Bit Description,” on
Ω
EXTERNAL
9 .1
9 .1
INTERNAL
E1
0
1
0
1
Ω
Ω
T
38
IN
ERMINATION
Figure 15
E
S
XTERNAL
ELECT
1 :2 .4 5
1 :1
TERMINATION
C
is a simplified block diagram for E1 (75Ω) in
C
ONTROL
T
100Ω
120Ω
110Ω
ONTROL
75Ω
ERMINATION
T
X
T
68.
RANSFORMER
Figure 14
1:2.45
7 5
7 5
1:2
M
ODE
Ω
Ω
R
(RXTSEL= 0)
ATIO
is a simplified block
XRT83L34
REV. 1.0.1
Table 10
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