DS3172 Maxim Integrated, DS3172 Datasheet - Page 68
![no-image](/images/no-image-200.jpg)
DS3172
Manufacturer Part Number
DS3172
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172
Part # Aliases
90-31720-000
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Figure 10-8. Performance Monitor Update Logic
10.4.6 Transmit Manual Error Insertion
Transmit errors can be inserted in some of the functional blocks. These errors can be inserted using register bits in
the functional blocks, using the global GL.CR1.TMEI bit, using the port PORT.CR1.TMEI bit, or by using the GPIO6
pin configured for TMEI mode.
There is a transmit error insertion register in the functional blocks that allow error insertion. The MEIMS bit controls
whether the error is inserted using the bits in the error insertion register or using error insertion signals external to
that block. When bit MEIMS=0, errors are inserted using other bits in the transmit error insertion register. When bit
MEIMS=1, errors are inserted using a signal generated in the port or global control registers or using the external
GPIO6 pin configured for TMEI operation.
GPIO8(GPMU) PIN
PORT.CR1.PMUM
PORT.CR1.PMU
GL.CR1.GPMU
GL.CR1.GPM
ONE SEC
1X
00
01
0
1
PMU PMS
COUNTER
other port counters
PERF
GTZ
68
other ports
GL.SR.GPMS
PORT.SR.PMS
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