DS3172 Maxim Integrated, DS3172 Datasheet - Page 41

• Manufacturer Part Number: DS3172
• Description: Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
• Manufacturer: Maxim Integrated

Specifications of DS3172

• Part # Aliases: 90-31720-000

Figure 8-13. DS3 SCT Mode Transmit Serial Interface Pin Timing
Figure 8-14. E3 G.751 SCT Mode Transmit Serial Interface Pin Timing
Figure 8-15. E3 G.832 SCT Mode Transmit Serial Interface Pin Timing
8.3.3.2
The RSERn signal has the DS3 or E3 payload as well as the DS3 or E3 overhead bits. The RDENn signal is used
to enable external logic for payload processing and will be high during the DS3 or E3 payload bits and low during
the DS3 or E3 overhead bits. The RGCLKn signal can also be used to clock only the DS3 or E3 payload bits into
external logic since the clock is stopped during the DS3 or E3 overhead bits. The RSOFOn signal marks the first
overhead bit of the DS3 or E3 frame.
Figure 8-16
DS3 TGCLK
E3 TGCLK
E3 TGCLK
TCLKO or
TCLKO or
TCLKO or
DS3 TSER
DS3 TDEN
E3 TSER
E3 TDEN
E3 TSER
E3 TDEN
TSOFO
TSOFO
TSOFO
TCLKI
TCLKI
TCLKI
TSOFI
TSOFI
TSOFI
DS3/E3 SCT Mode Receive Serial Interface Pin Functional Timing
to
Figure 8-18
1
1
1
2
2
2
3
3
3
show the relationship between the SCT receive port pins.
4
4
4
TSER DATA IS OVERWRITTEN WITH OH
5
5
5
TSER DATA IS OVERWRITTEN WITH OH
6
6
6
TSER DATA IS OVERWRITTEN WITH OH
7
7
7
8
8
8
9
9
9
10
10
10
11
41
11
11
12
12
12
13
13
13
14
14
14
15
15
15
16
17
18
19
20