XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 66

• Manufacturer Part Number: XRT83SL314ES
• Description: LIN Transceivers 14 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL314ES

• Product Category: LIN Transceivers
• Rohs: yes

XRT83SL314
REV. 1.0.1
B
D7
D6
D5
D4
D3
D2
D1
D0
IT
Reserved
SRESET
ATAOS
RCLKE
TCLKE
SR/DR
DATAP
N
GIE
AME
T
ABLE
Single Rail/Dual Rail Mode
This bit sets the LIU to receive and transmit digital data in a single
rail or a dual rail format.
0 = Dual Rail Mode
1 = Single Rail Mode
Automatic Transmit All Ones
If ATAOS is selected, an all ones pattern will be transmitted on any
channel that experiences an RLOS condition. If an RLOS condi-
tion does not occur, TAOS will remain inactive.
0 = Disabled
1 = Enabled
Receive Clock Data
0 = RPOS/RNEG data is updated on the rising edge of RCLK
1 = RPOS/RNEG data is updated on the falling edge of RCLK
Transmit Clock Data
0 = TPOS/TNEG data is sampled on the falling edge of TCLK
1 = TPOS/TNEG data is sampled on the rising edge of TCLK
Data Polarity
0 = Transmit input and receive output data is active "High"
1 = Transmit input and receive output data is active "Low"
This Register Bit is Not Used
Global Interrupt Enable
The global interrupt enable is used to enable/disable all interrupt
activity for all 14 channels. This bit must be set "High" for the inter-
rupt pin to operate.
0 = Disable all interrupt generation
1 = Enable interrupt generation to the individual channel registers
Software Reset
Writing a "1" to this bit for more than 10µS initiates a device reset
for all internal circuits except the microprocessor register bits. To
reset the registers to their default setting, use the Hardware Reset
pin (See the pin description for more details).
41: M
ICROPROCESSOR
G
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
LOBAL
R
F
UNCTION
EGISTER
R
63
EGISTER
(0
X
E0
0
X
H
E0
)
H
B
IT
D
ESCRIPTION
Register
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
xr
(HW reset)
Default
Value
0
0
0
0
0
0
0
0