XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 38

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XRT83SL314ES

Manufacturer Part Number
XRT83SL314ES
Description
LIN Transceivers 14 CHT1/E1 LIUSH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL314ES

Product Category
LIN Transceivers
Rohs
yes
XRT83SL314
REV. 1.0.1
The transmit path of the XRT83SL314 LIU consists of 14 independent T1/E1/J1 transmitters. The following
section describes the complete transmit path from TCLK/TPOS/TNEG inputs to TTIP/TRING outputs. A
simplified block diagram of the transmit path is shown in Figure 29.
F
In dual rail mode, TPOS and TNEG are the digital inputs for the transmit path. In single rail mode, TNEG has
no function and can be left unconnected. The XRT83SL314 can be programmed to sample the inputs on
either edge of TCLK. By default, data is sampled on the falling edge of TCLK. To sample data on the rising
edge of TCLK, set TCLKE to "1" in the appropriate global register. Figure 30 is a timing diagram of the transmit
input data sampled on the falling edge of TCLK. Figure 31 is a timing diagram of the transmit input data
sampled on the rising edge of TCLK. The timing specifications are shown in Table 8.
F
F
4.0 TRANSMIT PATH LINE INTERFACE
4.1
IGURE
IGURE
IGURE
TNEG
TCLK
TPOS
29. S
30. T
31. T
TCLK/TPOS/TNEG Digital Inputs
RANSMIT
RANSMIT
IMPLIFIED
HDB3/B8ZS
Encoder
TPOS
TNEG
TCLK
D
D
TPOS
TNEG
TCLK
or
B
or
ATA
ATA
LOCK
S
S
AMPLED ON
AMPLED ON
D
IAGRAM OF THE
Attenuator
Tx Jitter
F
R
ALLING
ISING
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
T
E
T
T
RANSMIT
SU
SU
E
DGE OF
Control
Timing
DGE OF
35
P
TCLK
T
T
ATH
TCLK
HO
HO
TCLK
TCLK
Tx Pulse Shaper
& Pattern Gen
F
R
TCLK
TCLK
R
F
Line Driver
xr
TTIP
TRING

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