XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 60

• Manufacturer Part Number: XRT83SL314ES
• Description: LIN Transceivers 14 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL314ES

• Product Category: LIN Transceivers
• Rohs: yes

XRT83SL314
REV. 1.0.1
N
OTE
B
B
D1
D0
: The GIE bit in the global register 0xE0h must be set to "1" in addition to the individual register bits to enable the
D7
D6
D5
IT
IT
interrupt pin.
EQFLAG
QRPDIE
RLOSIE
N
N
DMO
FLS
AME
AME
T
T
ABLE
ABLE
Receiver Loss of Signal Interrupt Enable
0 = Masks the RLOS function
1 = Enables Interrupt Generation
Quasi Random Signal Source Interrupt Enable
0 = Masks the QRPD function
1 = Enables Interrupt Generation
Equalizer Attenuation Flag
The equalizer attenuation flag is always active regardless if the
interrupt generation is disabled. This bit indicates the EQFLAG
activity. An interrupt will not occur unless the EQFLAGE is set to
"1" in the channel register 0x04h and GIE is set to "1" in the global
register 0xE0h.
0 = No Alarm
1 = Equalizer Attenuation Flag is Set
Digital Monitor Output
The digital monitor output is always active regardless if the inter-
rupt generation is disabled. This bit indicates the DMO activity. An
interrupt will not occur unless the DMOIE is set to "1" in the chan-
nel register 0x04h and GIE is set to "1" in the global register
0xE0h.
0 = No Alarm
1 = Transmit output driver has failures
FIFO Limit Status
The FIFO limit status is always active regardless if the interrupt
generation is disabled. This bit indicates whether the RD/WR
pointers are within 3-Bits. An interrupt will not occur unless the
FLSIE is set to "1" in the channel register 0x04h and GIE is set to
"1" in the global register 0xE0h.
0 = No Alarm
1 = RD/WR FIFO pointers are within ±3-Bits
29: M
30: M
ICROPROCESSOR
ICROPROCESSOR
C
C
HANNEL
HANNEL
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
0-13 (0
0-13 (0
F
F
UNCTION
UNCTION
R
R
57
EGISTER
EGISTER
X
X
04
05
H
H
-0
-0
0
X
0
X
D4
D5
X
X
04
05
H
H
H
)
H
)
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
Type
Type
R/W
R/W
RO
RO
RO
xr
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
0