S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 564

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S912XEQ512J3CAGR

Manufacturer Part Number
S912XEQ512J3CAGR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEQ512J3CAGR

Rohs
yes
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 kB
Data Ram Size
32 kB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
Interface Type
CAN/SCI/SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ512J3CAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
14.3.2.31 Modulus Down-Counter Count Register (MCCNT)
Read: Anytime
Write: Anytime.
All bits reset to one.
A full access for the counter register will take place in one clock cycle.
If the RDMCL bit in MCCTL register is cleared, reads of the MCCNT register will return the present value
of the count register. If the RDMCL bit is set, reads of the MCCNT will return the contents of the load
register.
If a 0x0000 is written into MCCNT when LATQ and BUFEN in ICSYS register are set, the input capture
and pulse accumulator registers will be latched.
With a 0x0000 write to the MCCNT, the modulus counter will stay at zero and does not set the MCZF flag
in MCFLG register.
If the modulus down counter is enabled (MCEN = 1) and modulus mode is enabled (MODMC = 1), a write
to MCCNT will update the load register with the value written to it. The count register will not be updated
with the new value until the next counter underflow.
If modulus mode is not enabled (MODMC = 0), a write to MCCNT will clear the modulus prescaler and
will immediately update the counter register with the value written to it and down-counts to 0x0000 and
stops.
The FLMC bit in MCCTL can be used to immediately update the count register with the new value if an
immediate load is desired.
564
Module Base + 0x0036
Module Base + 0x0037
Reset
Reset
W
W
R
R
MCCNT15
MCCNT7
15
1
1
7
A separate read/write for high byte and low byte will give different results
than accessing them as a word.
Figure 14-57. Modulus Down-Counter Count Register High (MCCNT)
Figure 14-58. Modulus Down-Counter Count Register Low (MCCNT)
MCCNT14
MCCNT6
14
1
1
6
MC9S12XE-Family Reference Manual Rev. 1.25
MCCNT13
MCCNT5
13
1
1
5
MCCNT12
MCCNT4
NOTE
12
1
1
4
MCCNT11
MCCNT3
11
1
1
3
MCCNT10
MCCNT2
10
1
1
2
MCCNT9
MCCNT1
Freescale Semiconductor
1
1
9
1
MCCNT8
MCCNT0
1
1
8
0

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