S912XEQ512J3CAGR Freescale Semiconductor, S912XEQ512J3CAGR Datasheet - Page 235

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S912XEQ512J3CAGR

Manufacturer Part Number
S912XEQ512J3CAGR
Description
16-bit Microcontrollers - MCU 16 BIT,512K FLASH
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S912XEQ512J3CAGR

Rohs
yes
Core
HCS12X
Data Bus Width
16 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
512 kB
Data Ram Size
32 kB
On-chip Adc
Yes
Package / Case
LQFP
Mounting Style
SMD/SMT
Interface Type
CAN/SCI/SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
119
Number Of Timers
25
Program Memory Type
Flash
Supply Voltage - Max
1.98 V, 2.9 V, 5.5 V
Supply Voltage - Min
1.72 V, 2.7 V, 3.13 V

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S912XEQ512J3CAGR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
4.3.1.8
Read: Anytime
Write: Anytime
4.3.1.9
Read: Anytime
Write: Anytime
Freescale Semiconductor
Address: Module Base + 0x0008
Address: Module Base + 0x0009
LOW_ADDR[
LOW_ADDR[
Reset
Reset
18:11]
Field
Field
10:3]
Field
7–0
7–0
WP
7
W
W
R
R
WP
MPU Descriptor Register 2 (MPUDESC2)
MPU Descriptor Register 3 (MPUDESC3)
Memory range lower boundary address bits — The LOW_ADDR[18:11] bits represent bits [18:11] of the
global memory address that is used as the lower boundary for the described memory range.
Memory range lower boundary address bits — The LOW_ADDR[10:3] bits represent bits [10:3] of the global
memory address that is used as the lower boundary for the described memory range.
Write-Protect bit — The WP bit causes the described memory range to be treated as write-protected. If this
bit is set every attempt to write in the described memory range causes an access violation.
0
0
7
7
NEX
0
0
6
6
Figure 4-10. MPU Descriptor Register 2 (MPUDESC2)
Figure 4-11. MPU Descriptor Register 3 (MPUDESC3)
MC9S12XE-Family Reference Manual Rev. 1.25
Table 4-10. MPUDESC2 Field Descriptions
Table 4-11. MPUDESC3 Field Descriptions
Table 4-9. MPUDESC1 Field Descriptions
0
0
0
5
5
LOW_ADDR[10:3]
0
0
0
4
4
Description
Description
Description
0
1
3
3
Chapter 4 Memory Protection Unit (S12XMPUV1)
HIGH_ADDR[22:19]
0
1
2
2
0
1
1
1
0
1
0
0
235

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