MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 95

• Manufacturer Part Number: MC56F8035VLD
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLD

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

6.3.13.1
This bit field is reserved. Each bit must be set to 0.
6.3.13.2
This field represents the upper two address bits of the “hard coded” I/O short address.
6.3.14
See
6.3.14.1
This field represents the lower 16 address bits of the “hard coded” I/O short address.
6.3.15
This register provides write protection of selected control fields for safety-critical applications. The
primary purpose is to prevent unsafe conditions due to the unintentional modification of these fields
between the onset of a code runaway and a reset by the COP watchdog. The GPIO and Internal Peripheral
Select Protection (GIPSP) field protects the contents of registers in the SIM and GPIO modules that control
inter-peripheral signal muxing and GPIO configuration. The Peripheral Clock Enable Protection (PCEP)
field protects the SIM registers’ contents, which contain peripheral clock controls. Some peripherals
provide additional safety features. Refer to the 56F802x and 56F803x Peripheral Reference Manual for
details.
Flexibility is provided so that write protection control values may themselves be optionally locked
(write-protected). Protection controls in this register have two bit values which determine the setting of the
control and whether the value is locked. While a protection control remains unlocked, protection can be
disabled and re-enabled by software. Once a protection control is locked, its value can only be altered by
a chip reset, which restores its default non-locked value.
Freescale Semiconductor
Section 6.3.13
Base + $10
Base + $11
RESET
RESET
Write
Write
Read
Read
I/O Short Address Location Register Low (SIM_IOSALO)
Protection Register (SIM_PROT)
Figure 6-16 I/O Short Address Location Low Register (SIM_IOSALO)
Figure 6-15 I/O Short Address Location High Register (SIM_IOSAHI)
Reserved—Bits 15—2
Input/Output Short Address Location (ISAL[23:22])—Bits 1–0
Input/Output Short Address Location (ISAL[21:6])—Bits 15–0
15
15
0
0
1
for general information about I/O short address location registers.
14
14
0
0
1
13
13
0
0
1
12
12
0
0
1
56F8035/56F8025 Data Sheet, Rev. 6
11
11
0
0
1
10
10
0
0
1
9
0
0
9
1
8
8
0
0
ISAL[21:6]
1
7
7
0
0
1
6
6
0
0
1
5
5
0
0
1
4
4
0
0
1
3
3
0
0
1
2
2
0
0
1
Register Descriptions
ISAL[23:22]
1
1
1
1
0
0
1
1
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