MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 78

• Manufacturer Part Number: MC56F8035VLD
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLD

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

5.6.19.3
This read-only field shows bits [7:1] of the Vector Address Bus used at the time the last IRQ was taken.
In the case of a Fast Interrupt, it shows the lower address bits of the jump address. This field is only updated
when the 56800E core jumps to a new interrupt service routine.
Note:
5.6.19.4
This bit allows all interrupts to be disabled.
5.6.19.5
This bit field is reserved. Each bit must be set to 1.
5.6.19.6
This bit field is reserved. Each bit must be set to 0.
5.7 Resets
5.7.1
78
•
•
0 = Normal operation (default)
1 = All interrupts disabled
Nested interrupts may cause this field to be updated before the original interrupt service routine can
read it.
General
Core Reset
Vector Number - Vector Address Bus (VAB)—Bits 12–6
Interrupt Disable (INT_DIS)—Bit 5
Reserved—Bits 4-2
Reserved—Bits 1–0
Reset
IPIC_VALUE[1:0]
00
01
10
11
Table 5-4 Interrupt Priority Encoding
Priority
56F8035/56F8025 Data Sheet, Rev. 6
Table 5-5 Reset Summary
No interrupt or SWILP
Current Interrupt
Priority Level
Priority 2 or 3
Priority 0
Priority 1
Source
RST
Exception Priority
Priorities 0, 1, 2, 3
Required Nested
Priorities 1, 2, 3
Priorities 2, 3
Core reset from the SIM
Priority 3
Characteristics
Freescale Semiconductor