MC56F8035VLD Freescale Semiconductor, MC56F8035VLD Datasheet - Page 86

• Manufacturer Part Number: MC56F8035VLD
• Description: Digital Signal Processors & Controllers - DSP, DSC 16 BIT DSPHC 64KB
• Manufacturer: Freescale Semiconductor

Specifications of MC56F8035VLD

• Rohs: yes
• Core: 56800E
• Data Bus Width: 16 bit
• Program Memory Size: 64 KB
• Data Ram Size: 8 KB
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 35
• Number Of Timers: 3
• Device Million Instructions Per Second: 32 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Package / Case: LQFP-44
• Mounting Style: SMD/SMT

6.3.6
This register controls the Standby mode of the large on-chip regulator. The large on-chip regulator derives
the core digital logic power supply from the IO power supply. At a system bus frequency of 200kHz, the
large regulator may be put in a reduced-power standby mode without interfering with device operation to
reduce device power consumption. Refer to the overview of power-down modes and the overview of clock
generation for more information on the use of large regulator standby.
6.3.6.1
This bit field is reserved. Each bit must be set to 0.
6.3.6.2
6.3.7
The Clock Output Select register can be used to multiplex out selected clock sources generated inside the
clock generation and SIM modules onto the muxed clock output pins. All functionality is for test purposes
only. Glitches may be produced when the clock is enabled or switched. The delay from the clock source
to the output is unspecified. The observability of the clock output signals at output pads is subject to the
frequency limitations of the associated IO cell.
GPIOA[3:0] can function as GPIO, PWM, or as clock output pins. If GPIOA[3:0] are programmed to
operate as peripheral outputs, then the choice is between PWM and clock outputs. The default state is for
the peripheral function of GPIOA[3:0] to be programmed as PWM (selected by bits [9:6] of the Clock
Output Select register).
See
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Figure 6-8
Base + $A
Base + $8
RESET
Write
Read
RESET
00 = Large regulator is in Normal mode
01 = Large regulator is in Standby (reduced-power) mode
10 = Large regulator is in Normal mode and the LRSTDBY field is write-protected until the next reset
11 = Large regulator is in Standby mode and the LRSTDBY field is write-protected until the next reset
Read
Write
SIM Power Control Register (SIM_PWR)
Clock Output Select Register (SIM_CLKOUT)
Reserved—Bits 15–2
Large Regulator Standby Mode (LRSTDBY)—Bits 1–0
for details.
15
0
0
15
0
0
14
Figure 6-7 SIM Power Control Register (SIM_PWR)
14
0
0
0
0
Figure 6-8 CLKO Select Register (SIM_CLKOUT)
13
13
0
0
0
0
12
12
0
0
0
0
56F8035/56F8025 Data Sheet, Rev. 6
11
11
0
0
0
0
10
0
10
0
0
0
PWM3
9
0
0
9
0
8
0
0
PWM2 PWM1 PWM0
8
0
7
0
0
7
0
6
0
0
6
0
5
0
0
5
1
1
4
0
0
4
0
0
3
0
0
Freescale Semiconductor
3
0
0
2
0
0
2
0
0
1
0
LRSTDBY
1
0
0
0
0
0
0
0