LH540235M-20 SHARP [Sharp Electrionic Components], LH540235M-20 Datasheet - Page 28

• Manufacturer Part Number: LH540235M-20
• Description: 2048 x 18 / 4096 x 18 Synchronous FIFOs
• Manufacturer: SHARP [Sharp Electrionic Components]

LH540235/45
TIMING DIAGRAMS (cont’d)
28
Enhanced Operating Mode Timing Diagram
NOTES:
1. t
2. PAE offset = q. Also, number of data words written into FIFO already = q.
3. The internal state of the FIFO:
rising RCLK edge for PAE to change predictably during the current
clock cycle. If the time between the rising edge of WCLK and the
rising edge of RCLK is less than t
that PAE will change state until the next following RCLK edge.
At
At
At
Q
D
SKEW2
WCLK
0
0
RCLK
WEN
- Q
- D
REN
PAE
A
B
C
OE
17
17
is the minimum time between a rising WCLK edge and a
, q+1 words.
, q words.
, q+1 words again.
LOW
t
ENS
A
t
DS
DATA WRITE 1
t
ENH
DATA IN OUTPUT REGISTER
t
SKEW2
Figure 15. Programmable-Almost-Empty Flag Timing,
When Synchronous (Enhanced Operating Mode )
(1)
SKEW2
, then it is not guaranteed
B
t
PAES
t
A
t
ENS
C
t
DS
t
DATA WRITE 2
PAES
t
ENH
t
SKEW2
2048 x 18/4096 x 18 Synchronous FIFOs
DATA READ
(1)
t
PAES
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