LH540235M-20 SHARP [Sharp Electrionic Components], LH540235M-20 Datasheet - Page 24

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LH540235M-20

Manufacturer Part Number
LH540235M-20
Description
2048 x 18 / 4096 x 18 Synchronous FIFOs
Manufacturer
SHARP [Sharp Electrionic Components]
Datasheet
LH540235/45
TIMING DIAGRAMS (cont’d)
24
NOTE:
1. t
rising WCLK edge for FF to change predictably during the current
clock cycle. If the time between the rising edge of RCLK and the
rising edge of WCLK is less than t
that FF will change state until the next following WCLK edge.
SKEW1
Q
D
0
0
WCLK
is the minimum time between a rising RCLK edge and a
RCLK
WEN
- Q
- D
REN
OE
FF
17
17
OUTPUT REGISTER
NO WRITE
LOW
t
ENS
t
ENH
DATA IN
t
SKEW1
SKEW1
t
A
, then it is not guaranteed
1
Figure 10. Full-Flag Timing
t
WFF
t
DS
DATA WRITE
t
WFF
DATA READ
NO WRITE
t
ENS
2048 x 18/4096 x 18 Synchronous FIFOs
t
t
ENH
SKEW1
t
A
1
t
DATA WRITE
WFF
DATA READ
NEXT
t
DS
540235-9

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